Senior SI Engineer, DDR4/DDR5 Memory Interface

USA Tech Recruit; Atlanta (GA); On-site; USD 120,000 - 180,000; Full time

Job summary

USA Tech Recruit is seeking a seasoned SPE Signal Integrity Engineer in the United States to lead SI/PI and package design for memory interface chips, driving high-speed DDR technologies at 12800+ MT/s. The role demands deep expertise in SI/PI, high-speed SerDes, and lab validation.

The ideal candidate will have 10+ years of experience, MS/PhD in EE, and hands-on familiarity with DDR4/5, SPICE/ADS, and EM transmission line theory, reporting to an advanced engineering team.

Qualifications

• 10+ years of experience in signal integrity, power integrity and/or package design.

Responsibilities

• Provide technical leadership across signal integrity, power integrity, package design and high-speed DDR technologies.
• Lead SI/PI activities across silicon, package, PCB, simulation and lab validation to deliver next-generation high-speed DDR technologies.

Skills

Signal Integrity

Power Integrity

Package Design

DDR4/DDR5

SerDes interfaces

Lab measurements

Oscilloscope/TDR/VNA

Communication skills

Education

MS or PhD in Electrical Engineering

Tools

ADS

HFSS

Q3D/PowerSI

Virtuoso

RedHawk/Totem

XcitePI

APD/Allegro

Job description

USA Tech Recruit is seeking a seasoned SPE Signal Integrity Engineer in the United States to lead SI/PI and package design for memory interface chips, driving high-speed DDR technologies at 12800+ MT/s. The role demands deep expertise in SI/PI, high-speed SerDes, and lab validation.

The ideal candidate will have 10+ years of experience, MS/PhD in EE, and hands-on familiarity with DDR4/5, SPICE/ADS, and EM transmission line theory, reporting to an advanced engineering team.