SPE Signal Integrity Engineer

Protingent

Johns Creek (GA)

Hybrid

USD 134,000 - 288,000

Full time

5 days ago
Be an early applicant
Application generator

A complete application in a minute — tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

Protingent is seeking an experienced SPE Signal Integrity Engineer in Johns Creek, GA. You will lead SI/PI methodologies and collaborate with design and validation teams to define packaging, routing, and decoupling requirements for DDR4/5 products.

You will guide the design team on SI/PI outcomes and help customer collaborations to optimize solutions. Requires 10+ years in SI/PI with DDR memory experience, strong EM theory, and proficiency in Spice/ADS simulations and relevant EDA tools.

Qualifications

  • Strong SI/PI and package design leadership
  • Experience with DDR4/5 as needed
  • Proficiency in EM and transmission line theory
  • FIR/FFE/DFE/CTLE equalization knowledge
  • Ability to edit APD/Allegro layout files
  • Familiarity with correlating simulation to lab measurements.
  • Server system knowledge from CPUs to DIMMs is a plus

Responsibilities

  • Create SI/PI methodologies and work with Design and SI teams for DDR product studies and package design
  • Define specs and system design requirements including packaging and PCB routings, IC-PKG-BRD decoupling, channel simulations and jitter analysis
  • Provide guidelines based on SI/PI study and silicon correlation to achieve superior SI performance
  • Collaborate with customers to identify optimal SI/PI solutions
  • Assist team during debug and lab bring-up

Skills

SI/PI
Package design
EM theory
Transmission line theory
Equalization (FIR/FFE/DFE/CTLE)
High-speed memory/SERDES
Lab measurement correlation
Circuit editing (APD/Allegro)
Spice/ADS simulations
EDA tools (ADS/HFSS/Q3D/PowerSI)
Virtuoso familiarity

Education

MS or PhD in Electrical Engineering

Tools

ADS
HFSS
Q3D/PowerSI
Virtuoso
RedHawk/Totem
XcitePI

Job description

Position Title

SPE Signal Integrity Engineer

Job Responsibilities
  • Create SI/PI methodologies and work with the Design and SI teams to do SI/PI study and package design for the latest DDR product portfolio
  • Work with our design team and validation team to define specifications and system design requirements such as packaging and PCB routings, IC-PKG-BRD decoupling requirements, channel simulations and jitter sensitivity analysis
  • Provide guideline to design team based on SI/PI study and simulation and silicon correlation so that our products will have superior SI performance, i.e. best RMT scores
  • Work with our customers to do collaboration to find the optimum SI/PI solution
  • Help the team during debug and bring up in lab if needed
Job Qualifications
  • Solid background in SI/PI and package design to provide technical leadership to the team
  • Strong interpersonal skill to keep the team motivated and focused
  • MS or PhD in Electrical Engineering with 10+ years of industry experience in which at least a few years with exposure to DDR4/5
  • Prior experience in simulating high speed memory (DDR4, DDR5) and/or SERDES interfaces is required
  • Solid theoretical background and understanding in EM and transmission line theory is a must
  • Strong background and solid understanding of equalization techniques such as FIR/FFE/DFE/CTLE are required
  • Must understand package and PCB design, be able to edit APD/Allegro layout files.
  • Know SI/PI driven BGA assignment methodology and be able to simulate for the trade-offs in the context of a system
  • Extensive experience in correlating simulation results with lab measurements using scopes, TDRs, VNAs etc.
  • Strong understanding of the server system, from CPUs to DRAMs on DIMM modules, is highly desirable
  • Know the mechanisms of crosstalk and jitter in source-synchronous interfaces and be able to include the effect of such losses into low BER simulations
  • Proficient with simulations using Spice and ADS
  • Experience with commercial EDA tools such as ADS, HFSS, Q3D/PowerSI
  • Familiarity with RedHawk/Totem or XcitePI and Virtuoso is a strong plus
  • Lab characterization experience of passive components, link margin, or noise using real time/sampling scopes and VNA/TDR is a big plus
  • Basic knowledge of circuits used in high-speed link design is preferred.
  • Excellent writing and presentation skills are essential as well as good communication skills to work with customers and cross-functional teams.
  • Must be an innovative, self-motivated individual, be able to manage and drive his projects, and must be a team player
Job Details
  • Job Type: Direct Hire
  • Location: Johns Creek, GA (Hybrid 3 days a week onsite)
  • Salary: $133,900 to $287,600
About Protingent

Protingent is an award-winning provider of top-tier Engineering and IT talent, trusted by companies at the forefront of innovation—from Software and Aerospace to AI, Clean Tech, Medical Devices, and Connected Technologies. We're passionate about connecting exceptional talent with meaningful opportunities and helping our clients build the future.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

SPE Signal Integrity Engineer
SPE Signal Integrity Engineer

OSI Engineering • Johns Creek (GA)

On-site
USD 150,000 - 200,000
SPE Signal Integrity Engineer
SPE Signal Integrity Engineer

Usatech Recruit • United States

On-site
USD 150,000 - 230,000
Senior DDR4/DDR5 Signal Integrity Engineer
Senior DDR4/DDR5 Signal Integrity Engineer

Protingent • Johns Creek (GA)

Hybrid
USD 134,000 - 288,000
SPE Signal Integrity Engineer
SPE Signal Integrity Engineer

Rambus.com • Johns Creek (GA)

On-site
USD 133,900 - 248,700
Base salary
Bonus
Equity
+4
Senior DDR SI/PI Engineer — High-Speed Memory
Senior DDR SI/PI Engineer — High-Speed Memory

Usatech Recruit • United States

On-site
USD 150,000 - 230,000
Senior Principal Signal Integrity Engineer
Senior Principal Signal Integrity Engineer

microTECH Global LTD • Atlanta (GA), Northern (KY)

Hybrid
USD 180,000 - 240,000
Technical Director Validation
Technical Director Validation

Protingent • Johns Creek (GA)

Hybrid
USD 161,000 - 298,000
Signal Integrity & Power Integrity Engineer
Signal Integrity & Power Integrity Engineer

Majestic Labs ai • Los Altos (CA)

On-site
USD 150,000 - 210,000
Hardware Engineering, Sr Staff Engineer- 19027
Hardware Engineering, Sr Staff Engineer- 19027

Ansys, Inc. • United States

Remote
USD 141,000 - 211,000
Annual bonus
Equity
SI/PI Engineer
SI/PI Engineer

The Consensus • San Jose (CA)

On-site
USD 140,000 - 230,000
Medical, dental & vision coverage
Housing subsidy
Relocation support
+3