Senior SI Architect — High‑Speed Interfaces

Micron Technology, Inc.; Boise (ID); On-site; USD 119,000 - 320,000; Full time

Benefits offered by this job

Medical, dental & vision plans

Paid time off

Paid holidays

Equity

Job summary

Micron Technology, Inc. in the United States is seeking a Principal Signal Integrity Engineer to lead interface pathfinding for high‑speed memory interfaces. You will own modeling, technique development, and cross‑functional collaboration to deliver robust pre‑silicon predictions.

The role emphasizes deep SI/PI expertise, hands‑on modeling, and a strategic impact across packaging, routing, and I/O optimization within a small, senior team.

Qualifications

• MS or PhD with hands‑on SI/PI modeling and simulation.
• Extensive experience with differential and single‑ended interfaces.
• Experience using time- & frequency‑domain tools and hardware measurement.
• Familiar with memory I/O architectures and advanced packaging challenges.

Responsibilities

• Own interconnect modeling from extraction to circuit simulation.
• Lead evaluation of forward‑looking substrate and packaging technologies.
• Conduct feasibility studies with I/O and channel co‑optimization.
• Develop design rules for package and system‑level performance scaling.
• Define link budgets and sim‑to‑silicon correlation methodologies.
• Collaborate across SI, circuit/chip design, packaging R&D and system teams.

Skills

Signal integrity

Electromagnetic field theory

Time‑domain analysis

Frequency‑domain analysis

Measurement tools—scope/TDR/VNA

Cross‑disciplinary collaboration

Strong written and verbal skills

Education

MS in Electrical Engineering

PhD in Electrical Engineering (preferred)

Tools

ADS

HSPICE

SPECTRE

Q3D

SIWAVE

HFSS

Job description

Micron Technology, Inc. in the United States is seeking a Principal Signal Integrity Engineer to lead interface pathfinding for high‑speed memory interfaces. You will own modeling, technique development, and cross‑functional collaboration to deliver robust pre‑silicon predictions.

The role emphasizes deep SI/PI expertise, hands‑on modeling, and a strategic impact across packaging, routing, and I/O optimization within a small, senior team.