Senior Signal Integrity Architect — High-Speed Interfaces

Micron Technology, Inc.

Folsom (CA)

On-site

USD 119,000 - 320,000

Full time

14 days+

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Job summary

Micron Technology is seeking a Principal Signal Integrity Engineer to lead high‑speed interface SI efforts. You will own modeling from extraction to simulation, evaluate substrate/packaging options, and drive pathfinding analyses with cross‑functional partners.

You will work with senior engineers across SI, circuit design, packaging R&D, and system integration to shape design rules and predictive methodologies for pre‑silicon performance. Excellent EM/SI expertise is essential.

Qualifications

  • MS or PhD in Electrical Engineering or related field; strong EM/SI fundamentals accepted.
  • 10+ years of industry experience in signal or power integrity for high-speed interfaces.
  • Extensive EM and transmission-line theory applied to SI/PI analyses.
  • Experience with time- and frequency-domain simulation tools (ADS, HSPICE, SPECTRE).
  • Experience with electromagnetic field solvers and hardware test‑equipment usage.

Responsibilities

  • Own generation and validation of interconnect models from extraction to circuit simulation.
  • Lead SI assessment of forward-looking substrate and packaging technologies.
  • Drive SI analysis during pathfinding studies and provide direction to teams.
  • Develop progressive design rules grounded in EM analysis and data.
  • Define link budgets and sim-to-silicon correlation methodologies.
  • Collaborate across SI, circuit/ chip design, packaging R&D, and system integration.
  • Author analysis reports, modeling methodology documents, and design-rule specs.

Skills

MS/PhD in EE
10+ years SI/PI
Electromagnetic theory
Time/Frequency domain sims
Field solvers
Measurement tools
Cross-discipline collaboration
Technical communication

Education

MS or PhD in Electrical Engineering

Tools

ADS
HSPICE
SPECTRE
Q3D
SIWAVE
HFSS

Job description

Micron Technology is seeking a Principal Signal Integrity Engineer to lead high‑speed interface SI efforts. You will own modeling from extraction to simulation, evaluate substrate/packaging options, and drive pathfinding analyses with cross‑functional partners.

You will work with senior engineers across SI, circuit design, packaging R&D, and system integration to shape design rules and predictive methodologies for pre‑silicon performance. Excellent EM/SI expertise is essential.

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