Senior SerDes Design & Validation Engineer

Apple, Inc.; San Diego (CA); Presencial; USD 175 000 - 309 000; Tempo integral

Resumo da oferta

Apple is seeking a SerDes Design and Validation Engineer to lead system validation of mixed-signal SerDes IP. You will drive design, integration and validation of high‑performance analog and mixed-signal blocks for PHY applications, including receivers, transmitters, bias generators and clock networks.

In this role you will develop test plans, review data and work with production test teams to debug bring‑up issues.

Qualificações

• BS degree in Electrical Engineering or related field.
• 10+ years of industry experience with SerDes or high-speed IO.
• Experience with analog mixed-signal blocks and DFT.

Responsabilidades

• Ownership of SerDes system bring-up, validation and debug.
• Work with design teams to define DFT needs for testability.
• Participate in mixed-signal verification and test development.

Conhecimentos

High-speed SerDes

Test planning

Data analysis

Lab debugging

Team collaboration

Formação académica

BS in Electrical Engineering

Ferramentas

ATE

DFT techniques

Descrição da oferta de emprego

Apple is seeking a SerDes Design and Validation Engineer to lead system validation of mixed-signal SerDes IP. You will drive design, integration and validation of high‑performance analog and mixed-signal blocks for PHY applications, including receivers, transmitters, bias generators and clock networks.

In this role you will develop test plans, review data and work with production test teams to debug bring‑up issues.