Senior SerDes Design Engineer – Analog/Mixed-Signal

Upscale, Inc.

United States

Presencial

USD 223.000 - 243.000

Jornada completa

Hace 4 días
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Descripción de la vacante

Upscale, Inc. is developing next-generation AI infrastructure and seeks talented analog and mixed-signal design engineers to develop SerDes circuits and core IP for high-bandwidth interconnects.

You will design, simulate, and optimize analog/mixed-signal circuits, perform transistor-level design, and collaborate with architecture/digital teams to meet power, performance, and area targets. The role offers a competitive salary and remote-friendly options.

Formación

  • B.S., M.S., or Ph.D. in Electrical Engineering or related field.
  • Experience in analog/mixed-signal IC design and high-speed circuits.
  • Proficiency with SPICE simulators and IC design workflows.
  • Scripting with Python or MATLAB.

Responsabilidades

  • Design, simulate, and optimize analog and mixed-signal circuits for next-generation high-speed SerDes and related IP.
  • Perform transistor-level circuit design, behavioral modeling, and performance analysis to meet demanding power, performance, and area targets.
  • Develop simulation testbenches, analyze circuit behavior, and troubleshoot performance or convergence issues.
  • Collaborate with architecture, digital design, physical design, layout, and validation teams to drive design integration and closure.
  • Participate in design reviews, identify potential risks, and develop practical solutions to challenging circuit-level problems.
  • Support physical implementation, post-layout verification, silicon characterization, and debug as needed.
  • Develop scripts and automation to improve simulation efficiency, design productivity, and data analysis.
  • Document design methodologies, simulation results, and technical findings.

Conocimientos

Analog/mixed-signal design
High-speed SerDes
Circuit design
Scripting (Python/MATLAB)
Teamwork

Educación

B.S., M.S., or Ph.D. in Electrical Engineering

Descripción del empleo

Upscale, Inc. is developing next-generation AI infrastructure and seeks talented analog and mixed-signal design engineers to develop SerDes circuits and core IP for high-bandwidth interconnects.

You will design, simulate, and optimize analog/mixed-signal circuits, perform transistor-level design, and collaborate with architecture/digital teams to meet power, performance, and area targets. The role offers a competitive salary and remote-friendly options.

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