Senior SerDes Analog/Mixed-Signal Engineer

Upscale; Kentucky; On-site; USD 120,000 - 180,000; Full time

Job summary

Upscale, Inc. is building high-performance AI infrastructure in the United States and is seeking analog and mixed-signal design engineers to develop SerDes circuits and foundation IP for high-bandwidth interconnects.

You will design, simulate, and optimize circuits, collaborate across architecture, digital design, physical design, and validation teams, and contribute to silicon bring-up and post-layout verification. We value ownership and rigorous engineering practice.

Qualifications

• B.S., M.S., or Ph.D. in Electrical Engineering or a related field.
• Experience in analog/mixed-signal IC design or high-speed circuits.
• Strong understanding of transistor-level design and SPICE-based simulation.
• Familiarity with scripting languages such as Python or MATLAB.

Responsibilities

• Design, simulate, and optimize analog and mixed-signal circuits for SerDes and related IP.
• Perform transistor-level circuit design, behavioral modeling, and performance analysis.
• Develop simulation testbenches, analyze circuit behavior, and troubleshoot issues.
• Collaborate with architecture, digital design, layout, and validation teams for integration.
• Participate in design reviews and develop solutions to challenging circuit problems.
• Support physical implementation, post-layout verification, and silicon characterization.
• Develop scripts to improve simulation efficiency and data analysis.
• Document design methodologies and results.

Skills

Analog/mixed-signal IC design

High-speed circuit design

SPICE-based simulators

Python scripting

MATLAB

Team collaboration

Education

BS/MS/PhD in Electrical Engineering

Tools

SPICE

Python

MATLAB

Job description

Upscale, Inc. is building high-performance AI infrastructure in the United States and is seeking analog and mixed-signal design engineers to develop SerDes circuits and foundation IP for high-bandwidth interconnects.

You will design, simulate, and optimize circuits, collaborate across architecture, digital design, physical design, and validation teams, and contribute to silicon bring-up and post-layout verification. We value ownership and rigorous engineering practice.