Senior Semiconductor Package Design Engineer

Micross Company; Florida; On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical benefits

Dental and vision plans

401k with employer match

Paid vacation and holidays

Job summary

Micross is seeking a Semiconductor Package Design Engineer to join our team in Apopka, Florida or Raleigh, North Carolina. You will design advanced semiconductor packages, including layout and parasitic extraction, collaborating with IC, system, SI/PI, and thermal teams to optimize interposers and substrates.

The role requires 8–10 years in packaging, strong APD+ proficiency, and experience with 2.5D/3D packaging.

Qualifications

• Bachelor's degree in Electrical Engineering, Mechanical Engineering, or other semiconductor packaging related discipline.
• 8 to 10 years of experience in semiconductor packaging design, modeling, and simulations
• Strong authority on Cadence Allegro Package Designer Plus (APD+)
• Experience on interposer and substrate layouts and design in advanced package technologies
• Experience with 2.5D, 3D package design
• Experience with design teams on floor plan, bump and layout optimization
• Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated
• Record of success in cross-functional team environment
• Good experience with SI/PI tools for package level extraction/simulation

Responsibilities

• Design of advanced semiconductor packages, including layout, parasitic extraction, and optimization
• Work with IC design, system design, package Signal Integrity (SI)/Power Integrity (PI) & thermal engineering teams to design custom interposer and substrates
• Work with SoC design teams to optimize die floorplan, bump patterns and interposer / substrate stack up
• Work with IC design team to define IC package requirements
• Design package layout using standard CAD tools
• Extract package parasitics and conduct PI/SI analysis
• Documentation and release in appropriate archival system

Skills

APD+ expertise

2.5D/3D packaging

Interposer and substrate layouts

Cross-functional teamwork

Problem solving

Education

Bachelor's degree in Electrical Engineering

Semiconductor packaging related discipline (incl. Mechanical Eng)

Tools

Cadence Allegro APD+

Sigrity SI II

Sigrity PI II

AWR

Momentum

HFSS

2.5D/3D packaging experience

Job description

If you are unable to complete this application due to a disability, contact this employer to ask for an accommodation or an alternative application process.

Full Time- ISV Professional Apopka, FL, US

30+ days ago Requisition ID: 1653

Micross is seeking a Semiconductor Package Design Engineer to work in our Apopka, Floridaor Raleigh, North Carolina facility.

Essential Duties and Responsibilities:

• The primarily responsible for design of advanced semiconductor packages, including both ceramic and organic substrates, including layout, parasitic extraction, and optimization
• Work with IC design, system design, package Signal Integrity (SI)/Power Integrity (PI) & thermal engineering teams to design custom interposer and substrates
• Work with SoC design teams to optimize die floorplan, bump patterns and interposer / substrate stack up
• Work with IC design team to define IC package requirements
• Design package layout using standard CAD tools
• Extract package parasitics and conduct PI/SI analysis
• Documentation and release in appropriate archival system

Preferred Knowledge, Skills, And Abilities

Layout:

• Allegro Package Designer Plus (APD+) tools for designing the package and generating artwork for fabrication.

Analysis:

• Sigrity Advanced SI II: Analysis tools for Signal integrity of parallel busses (DDRx) and serial links (PCIe Gen x), including Package and PCB effects
• Sigrity Advanced PI II: Power Integrity tools (IR drop, Impedance Profile, capacitor optimization) including Package and PCB effects

RF / Microwave Design

• AWR, Momentum and HFSS Software Circuit, system, and EM simulation for RF/microwave product development

Qualifications

• Bachelors degree in Electrical Engineering, Mechanical Engineering, or other semiconductor packaging related discipline.
• 8 to 10 years of experience in semiconductor packaging design, modeling, and simulations
• Strong authority on Cadence Allegro Package Designer Plus (APD+)
• Experience on interposer and substrate layouts and design in advanced package technologies
• Experience with 2.5D, 3D package design
• Experience with design teams on floor plan, bump and layout optimization
• Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated
• Record of success in cross-functional team environment
• Good experience with SI/PI tools for package level extraction/simulation

At Micross, our Core Values of integrity, communication, teamwork, quality and execution, self-discipline and accountability are cultivated throughout all levels of the organization. Micross provides a challenging and enjoyable workplace for members and supports the needs of the community.

Micross provides competitive benefits including medical, HSA and FSA plans, dental, vision, company paid basic Life Insurance, Employee Assistance Program (EAP), 401k with employer match, paid leave, vacation, holidays, generous tuition assistance, 529 College Savings, Pet insurance, Legal insurance, and a range of well-being programs available.