Senior RTL & SoC Debug | CDC/Verification Expert

Broadcom, Inc.; San Jose (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Broadcom Inc. in California seeks a senior RTL/SoC verification engineer to perform IP integration, test and debug at the SoC level, and create RTL designs with linting. The role includes CDC/RDC analysis for RTL and gate-level designs, plus synthesis, palladium modeling and STA support.

Candidates should have expertise in UVM and SystemVerilog, GLS, zero-delay and SDF simulations, and strong debugging and communication skills. A Bachelor's degree with 12+ years experience is required.

Qualifications

• Bachelor's degree required with 12+ years of experience.
• Expertise in RTL/SoC verification, IP integration, and test at the SoC level.
• Strong debugging and communication skills required.

Responsibilities

• Perform IP integration, test and debug at the SoC level.
• Create RTL designs with linting.
• Conduct CDC/RDC analysis for RTL and gate-level designs; perform synthesis and STA support.

Skills

RTL verification

SoC verification

Debugging

Communication skills

SystemVerilog

UVM

GLS

SDF simulations

Zero-delay simulations

Education

Bachelor's degree in Electrical Engineering or related field

Tools

Palladium modeling

Job description

Broadcom Inc. in California seeks a senior RTL/SoC verification engineer to perform IP integration, test and debug at the SoC level, and create RTL designs with linting. The role includes CDC/RDC analysis for RTL and gate-level designs, plus synthesis, palladium modeling and STA support.

Candidates should have expertise in UVM and SystemVerilog, GLS, zero-delay and SDF simulations, and strong debugging and communication skills. A Bachelor's degree with 12+ years experience is required.