Senior RTL Engineer: CDC & Synthesis Expert

Sintegra Inc.; Santa Clara (CA); On-site; USD 150,000 - 230,000; Full time

Job summary

Sintegra Inc. in Santa Clara is seeking a Senior Engineer with deep expertise in Clock Domain Crossing (CDC) analysis and RTL Synthesis to drive robust signoff for complex SoCs on advanced nodes.

The role requires hands-on experience with multiple tapeouts, strong scripting skills, and the ability to manage CDC and synthesis closure from RTL through implementation, collaborating with cross‑functional teams.

Qualifications

• BS/MS in Electrical Engineering, Computer Engineering, or related field.
• 8+ years of industry experience in synthesis and CDC verification.
• Proven track record with multiple tapeouts on advanced nodes (7nm and below).

Responsibilities

• Perform CDC analysis and verification across block-level and full-chip designs.
• Develop and maintain CDC methodologies and flows to ensure robust signoff.
• Drive RTL synthesis using industry-standard tools, optimizing QoR (Power, Performance, Area).
• Collaborate with design, verification, and physical design teams to align constraints and methodology.
• Debug and resolve complex CDC and synthesis issues across large-scale SoCs.
• Contribute to methodology improvements and automation for synthesis and CDC closure.

Skills

CDC analysis

RTL synthesis

Scripting (Tcl/Python/Perl)

Debugging

Communication skills

Tapeouts

Education

BS/MS in EE or CE

Tools

Synopsys Design Compiler

Fusion Compiler

SpyGlass CDC

Conformal

Job description

Sintegra Inc. in Santa Clara is seeking a Senior Engineer with deep expertise in Clock Domain Crossing (CDC) analysis and RTL Synthesis to drive robust signoff for complex SoCs on advanced nodes.

The role requires hands-on experience with multiple tapeouts, strong scripting skills, and the ability to manage CDC and synthesis closure from RTL through implementation, collaborating with cross‑functional teams.