Senior RTL Design Engineer: Synthesis & Timing (Onsite)

Inabia-Software-; San Francisco (CA); On-site; USD 140,000 - 190,000; Full time

Job summary

Arrow Electronics is seeking a Design Engineer for the Bay Area (onsite) to drive RTL2PD activities. The candidate will contribute to RTL synthesis, constraint writing, validation, and Static Timing Analysis within an RTL2PD to Physical Design flow.

The role requires 8–12 years of hands-on RTL Synthesis experience, familiarity with Design Compiler, PrimeTime, Tempus, Genus, and experience across 16nm and 7nm process nodes. Scripting for RTL, SDC, and STA is essential.

Qualifications

• 8–12 years of hands‑on RTL Synthesis experience.
• Experience with 16nm, 7nm process nodes.
• Proficient with Design Compiler, PrimeTime, Tempus, Genus.
• Strong timing closure and STA debugging skills.
• Scripting for RTL synthesis and SDC creation.

Responsibilities

• RTL Synthesis, Constraint writing, validation, Static timing Analysis
• Writing scripts/modifying scripts for RTL synthesis, SDC creation, STA
• Debug synthesis issues and STA
• Generate clean netlist.

Skills

RTL Synthesis

Constraint writing

Validation

Static timing Analysis

Design Compiler

PrimeTime

Tempus

Genus

Scripting for RTL

Multi-node design

Tools

Design Compiler

PrimeTime

Tempus

Genus

Job description

Arrow Electronics is seeking a Design Engineer for the Bay Area (onsite) to drive RTL2PD activities. The candidate will contribute to RTL synthesis, constraint writing, validation, and Static Timing Analysis within an RTL2PD to Physical Design flow.

The role requires 8–12 years of hands-on RTL Synthesis experience, familiarity with Design Compiler, PrimeTime, Tempus, Genus, and experience across 16nm and 7nm process nodes. Scripting for RTL, SDC, and STA is essential.