RTL2PD Design Engineer II — On-Site (San Jose/Austin)

Arrow Electronics; San Jose (CA); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, Dental, Vision Insurance

401k with matching

Paid Time Off

Job summary

Arrow Electronics is seeking a Physical Design Engineer II (eInfochips Inc) for on-site roles in San Jose, CA and Austin, TX. You will contribute to RTL2PD flows, perform synthesis, timing analysis, and constraint writing for ASIC designs.

Ideal candidates have 8–12 years of RTL synthesis experience with hands-on use of Design Compiler, PrimeTime, Tempus, Genus, and Innovus. A Bachelor’s in electronics engineering is required.

Qualifications

• 8–12 years of hands-on RTL synthesis experience.
• Experience with multi-node designs (16nm, 7nm and beyond).
• Bachelor’s degree in electronic engineering or equivalent.

Responsibilities

• RTL to physical design (RTL2PD) work on ASIC flows.
• Write and validate constraints, run synthesis and STA.
• Debug synthesis issues and STA, generate clean netlists.
• Develop/scripts for RTL synthesis, SDC creation.

Skills

RTL2PD

RTL Synthesis

Constraint writing

Validation

Static timing Analysis

Scripting

Education

Bachelor's Degree in electronics engineering

Tools

Design Compiler

Primetime

Tempus

Genus

Innovus

Job description

Arrow Electronics is seeking a Physical Design Engineer II (eInfochips Inc) for on-site roles in San Jose, CA and Austin, TX. You will contribute to RTL2PD flows, perform synthesis, timing analysis, and constraint writing for ASIC designs.

Ideal candidates have 8–12 years of RTL synthesis experience with hands-on use of Design Compiler, PrimeTime, Tempus, Genus, and Innovus. A Bachelor’s in electronics engineering is required.