Senior RFIC Design Lead – Starshield Silicon

SpaceX; Irvine (CA); On-site; USD 210,000 - 340,000; Full time

Benefits offered by this job

Stock options

401(k) plan

Paid time off

Job summary

SpaceX is seeking a Principal RFIC Design Engineer (Starshield Silicon) to advance RF/analog/microwave circuit design for space and ground systems. You will develop next‑generation RFICs in SiGe/GaAs/GaN/CMOS, work with cross‑functional teams, and own packaging and test integration to production.

The role demands hands-on design, simulation, and verification, with collaboration across system architects, modem/DSP, and ASIC teams.

Qualifications

• Bachelors in electrical/computer engineering or computer science.
• 8+ years of professional RF IC experience.
• Strong design, modelling and test experience in RF/analog/mixed-signal domains.

Responsibilities

• Design, simulate and model RF/analog/mixed-signal circuits and systems.
• Derive specifications for RFIC subsystems and circuits.
• Develop analog/mixed-signal/RF/microwave circuits in SiGe, GaAs, GaN, or CMOS processes.
• Collaborate with system architects and ASIC engineers to partition functions between hardware and software.
• Perform IC floor planning and layout.
• Own packaging prototypes and release to production; model parasitics.
• Evaluate and characterize prototypes; assist in automated test lab equipment development.
• Coordinate with manufacturing for production testing and qualification.

Skills

RF/analog/mixed-signal design

Specification derivation

Hardware/software partitioning

IC floor planning

Packaging prototypes

Production testing

RF front end blocks MMIC design

RF transceiver architectures

Test equipment familiarity

Simulation tools knowledge

Education

Bachelor's degree in EE/CE/CS

Master's or PhD in EE/CE (RF/analog focus)

Tools

Spectre

ADS

HFSS

Momentum

Job description

SpaceX is seeking a Principal RFIC Design Engineer (Starshield Silicon) to advance RF/analog/microwave circuit design for space and ground systems. You will develop next‑generation RFICs in SiGe/GaAs/GaN/CMOS, work with cross‑functional teams, and own packaging and test integration to production.

The role demands hands-on design, simulation, and verification, with collaboration across system architects, modem/DSP, and ASIC teams.