Senior Principal SerDes Transmitter Architect

Upscale, Inc.; United States; On-site; USD 261,000 - 297,000; Full time

Job summary

Upscale, Inc. is building a world-class SerDes engineering team to enable next-generation AI data center connectivity.

We seek a Senior Principal Engineer to lead SerDes transmitter design, clock generation, and advanced transmitter architectures, driving silicon-robust solutions and power-efficient performance. The candidate will own blocks from architecture through tape-out, working with cross-functional teams, and mentoring engineers to raise the technical bar in high-speed interconnect

Qualifications

• MS or PhD in Electrical Engineering or a related field, with substantial experience in high-speed analog and mixed-signal IC design.
• Experience with high-speed SerDes transmitters or comparable high-performance transmit circuits.
• Expertise in transmitter clocking, high-speed DACs, or advanced transmitter architectures.
• Strong understanding of high-speed circuit design principles, bandwidth, parasitics, jitter and power optimization.
• Experience with CMOS technologies and the challenges of implementing high-speed circuits.

Responsibilities

• Lead architecture, design, and implementation of high-speed SerDes transmitter circuits with focus on performance and power efficiency.
• Drive transmitter clock generation, distribution, timing optimization, and jitter management.
• Lead design and optimization of high-speed DACs, including time-interleaved architectures.
• Develop and optimize calibration techniques for high-speed time-interleaved DACs.
• Lead output driver designs using current-mode and voltage-mode architectures for optimal signal integrity.
• Develop bandwidth-extension techniques using inductive peaking and impedance shaping.
• Apply EM simulation and extraction tools to optimize passive structures and interconnects.
• Collaborate with cross-functional teams to optimize end-to-end link performance.
• Guide silicon validation, tape-out readiness, and design reviews.

Skills

High-speed SerDes

Transmitter clocking

High-speed DACs

Output drivers

CMOS technologies

Circuit simulation

EM analysis

Layout collaboration

Silicon validation

Technical leadership

Education

MS or PhD in Electrical Engineering or related field

Tools

Cadence EMX

Ansys HFSS

Job description

Upscale, Inc. is building a world-class SerDes engineering team to enable next-generation AI data center connectivity.

We seek a Senior Principal Engineer to lead SerDes transmitter design, clock generation, and advanced transmitter architectures, driving silicon-robust solutions and power-efficient performance. The candidate will own blocks from architecture through tape-out, working with cross-functional teams, and mentoring engineers to raise the technical bar in high-speed interconnect