Senior Principal FW/SW Engineer for AI Connectivity

Astera Labs; San Jose (CA); Presencial; USD 180.000 - 250.000; Tempo integral

Benefícios oferecidos por esta vaga

Discretionary bonus

Benefits

Resumo da vaga

Astera Labs in San Jose, CA, is seeking a Senior Principal / Distinguished Engineer to lead FW/SW development for our Intelligent Connectivity Platform. This high-impact ICIC role involves architecting firmware and software across the full stack, from embedded boot code to host-side tooling.

You will partner with ASIC design, verification, and systems teams to deliver scalable PCIe, CXL, and Ethernet connectivity solutions.

Qualificações

• Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or related field.
• 12+ years of firmware and/or software development in semiconductor or systems companies.
• Strong proficiency in C and C++ for embedded and systems-level programming.
• Experience developing firmware for ARM-based SoCs or custom ASIC platforms.
• Deep understanding of hardware-software interfaces, register programming, and low-level debug techniques.
• Experience with high-speed interconnect protocols such as PCIe, CXL, or Ethernet at the firmware/driver level.

Responsabilidades

• Architect and develop production-quality embedded firmware for Astera Labs connectivity ASICs, including boot code and runtime firmware.
• Design host-side software, drivers, and SDK components that enable seamless integration of Astera Labs products into customer platforms.
• Define firmware/software architecture strategies that scale across multiple product lines and generations.
• Partner with ASIC design and verification teams to define hardware-firmware interfaces and co-design features for optimal system performance.
• Drive technical decisions spanning firmware, diagnostic tools, manufacturing software, and customer-facing utilities.
• Collaborate with applications and field engineering teams to resolve complex system-level issues at customer sites.
• Establish and evolve firmware/software development processes, coding standards, and CI/CD practices across the engineering organization.
• Lead design and code reviews, driving engineering excellence and continuous improvement.
• Mentor engineers across multiple teams, raising the overall technical bar.

Conhecimentos

C/C++

Embedded firmware

ARM-based SoCs

HW-SW interfaces

PCIe/CXL/Ethernet

Linux kernel/Drivers

Python

Formação

Bachelor's degree in CS/EE

Master's degree (preferred)

Ferramentas

Linux kernel development

Device drivers

UEFI/BIOS

Descrição da vaga

Astera Labs in San Jose, CA, is seeking a Senior Principal / Distinguished Engineer to lead FW/SW development for our Intelligent Connectivity Platform. This high-impact ICIC role involves architecting firmware and software across the full stack, from embedded boot code to host-side tooling.

You will partner with ASIC design, verification, and systems teams to deliver scalable PCIe, CXL, and Ethernet connectivity solutions.