Senior Principal Engineer - FW/SW Development

Linuxconfig; San Jose (CA); On-site; USD 180,000 - 250,000; Full time

Job summary

Astera Labs in San Jose, CA, seeks an experienced Senior Principal / Distinguished Engineer to lead firmware and software development for AI connectivity platforms. The role spans embedded firmware to host software, driving architecture decisions across multiple product lines and mentoring engineers.

You will collaborate with ASIC design, verification, and systems teams to deliver robust PCIe, CXL, and Ethernet solutions, shaping next-generation infrastructure for scalable AI deployments.

Qualifications

• Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or related field.
• 12+ years of firmware/software development experience in semiconductor or systems companies.
• Strong proficiency in C and C++ for embedded and systems-level programming.
• Experience developing firmware for ARM-based SoCs or custom ASIC platforms.
• Deep understanding of hardware-software interfaces, registers, and low-level debugging.

Responsibilities

• Architect and develop production-quality embedded firmware for Astera Labs connectivity ASICs, including boot code and runtime firmware.
• Design and implement host-side software, drivers, and SDK components for customer platforms integration.
• Define firmware/software architecture strategies that scale across product lines and generations.
• Partner with ASIC design and verification teams to define hardware-firmware interfaces and co-design features.
• Drive technical decisions spanning firmware, diagnostic tools, manufacturing software, and customer utilities.
• Collaborate with applications and field engineering teams to resolve complex system-level issues at customer sites.

Skills

C/C++

Embedded FW

ARM SoCs

Device drivers

PCIe/CXL/Ethernet

Low-level debugging

Education

Bachelor's degree in CS/EE

Master's degree (preferred)

Tools

Python

Linux kernel development

Job description

San Jose, California, United States

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com .

Role Overview

Astera Labs is seeking a Senior Principal / Distinguished Engineer - FW/SW Development to join our engineering team in San Jose, CA. This is a high-impact individual contributor role at the heart of our Intelligent Connectivity Platform, where you'll architect and develop firmware and software that powers the next generation of AI infrastructure connectivity solutions.

As a Senior Principal / Distinguished Engineer, you'll operate across the full stack — from low-level embedded firmware running on custom silicon to higher-level software tools and frameworks that enable our customers to deploy and manage Astera Labs products at scale. You'll work at the intersection of hardware and software, collaborating closely with ASIC design, verification, applications, and systems engineering teams to deliver world-class solutions spanning PCIe, CXL, and Ethernet connectivity.

This role offers extraordinary breadth and technical ownership. You'll influence architectural decisions across multiple product lines, mentor engineers across the organization, and drive best practices in firmware/software development as Astera Labs continues its hyper-growth trajectory powering the AI revolution.

Key Responsibilities

Firmware & Software Architecture

• Architect and develop production-quality embedded firmware for Astera Labs connectivity ASICs, including boot code, initialization sequences, and runtime firmware
• Design and implement host-side software, drivers, and SDK components that enable seamless integration of Astera Labs products into customer platforms
• Define firmware/software architecture strategies that scale across multiple product lines and generations

Cross-Functional Technical Leadership

• Partner with ASIC design and verification teams to define hardware-firmware interfaces and co-design features for optimal system performance
• Drive technical decisions spanning firmware, diagnostic tools, manufacturing software, and customer-facing utilities
• Collaborate with applications and field engineering teams to resolve complex system-level issues at customer sites

Quality & Best Practices

• Establish and evolve firmware/software development processes, coding standards, and CI/CD practices across the engineering organization
• Lead design and code reviews, driving a culture of engineering excellence and continuous improvement
• Mentor and guide engineers across multiple teams, raising the overall technical bar of the organization

Innovation & Strategy

• Evaluate emerging technologies and industry trends to inform next-generation firmware/software strategies
• Contribute to product roadmap discussions, providing firmware/software feasibility analysis and effort estimation
• Drive innovation in areas such as firmware update mechanisms, telemetry, RAS features, and manageability frameworks

Basic Qualifications

• Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field
• 12+ years of experience in firmware and/or software development for semiconductor or systems companies
• Strong proficiency in C and C++ for embedded and systems-level programming
• Experience developing firmware for ARM-based SoCs or custom ASIC platforms
• Deep understanding of hardware-software interfaces, register programming, and low-level debug techniques
• Experience with high-speed interconnect protocols such as PCIe, CXL, or Ethernet at the firmware/driver level

Preferred Qualifications

• Master's degree in Computer Science, Electrical Engineering, or related field
• Experience with RTOS-based and bare-metal firmware development environments
• Proficiency in Python for automation, tooling, and test development
• Familiarity with Linux kernel development, device drivers, or platform firmware (UEFI/BIOS)
• Track record of leading firmware/software efforts from architecture through production across multiple product generations
• Experience in the data center, AI/ML infrastructure, or high-performance computing domains

The salary range for this position is $180,000 to $250,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Voluntary Self-Identification

For government reporting purposes, we ask candidates to respond to the below self-identification survey.Completion of the form is entirely voluntary. Whatever your decision, it will not be considered in the hiringprocess or thereafter. Any information that you do provide will be recorded and maintained in aconfidential file.

As set forth in Astera Labs’s Equal Employment Opportunity policy,we do not discriminate on the basis of any protected group status under any applicable law.

If you believe you belong to any of the categories of protected veterans listed below, please indicate by making the appropriate selection.As a government contractor subject to the Vietnam Era Veterans Readjustment Assistance Act (VEVRAA), we request this information in order to measurethe effectiveness of the outreach and positive recruitment efforts we undertake pursuant to VEVRAA. Classification of protected categoriesis as follows:

A "disabled veteran" is one of the following: a veteran of the U.S. military, ground, naval or air service who is entitled to compensation (or who but for the receipt of military retired pay would be entitled to compensation) under laws administered by the Secretary of Veterans Affairs; or a person who was discharged or released from active duty because of a service-connected disability.

A "recently separated veteran" means any veteran during the three-year period beginning on the date of such veteran's discharge or release from active duty in the U.S. military, ground, naval, or air service.

An "active duty wartime or campaign badge veteran" means a veteran who served on active duty in the U.S. military, ground, naval or air service during a war, or in a campaign or expedition for which a campaign badge has been authorized under the laws administered by the Department of Defense.

An "Armed forces service medal veteran" means a veteran who, while serving on active duty in the U.S. military, ground, naval or air service, participated in a United States military operation for which an Armed Forces service medal was awarded pursuant to Executive Order 12985.