Senior Physical Design Engineer (SoC/ASIC)

Qualcomm Incorporated; Austin (TX); On-site; USD 146,000 - 218,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking talented Physical Design Engineers to join our SoC/ASIC design teams. You will contribute to floorplanning, CTS, timing, and low-power implementations across AI, mobile, automotive, and data-center projects.

The role involves collaborating with architecture, RTL, DFT, and verification teams to deliver sign-off-ready designs and innovative low-power methodologies for new process nodes.

Qualifications

• Bachelor's or higher in a related technical field.
• 4+ years in ASIC/SoC design, verification, or related work.
• Proficiency with CAD tools and scripting for automation.

Responsibilities

• Execute all stages of the physical design flow from netlist to tape-out.
• Develop physical design solutions for complex ASICs/SoCs.
• Perform floorplanning, CTS, routing, and timing optimization.
• Analyze timing, SI, crosstalk, and DRC violations; support sign-off.
• Collaborate with architecture, RTL, DFT, and methodology teams.

Skills

Physical design

Problem solving

ASIC development debugging

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Tools

Cadence Innovus

Synopsys Fusion Compiler

Synopsys PrimeTime SI

Python

Perl

TCL

Shell scripting

C/C++

Linux/Unix

Job description

Qualcomm Technologies, Inc. is seeking talented Physical Design Engineers to join our SoC/ASIC design teams. You will contribute to floorplanning, CTS, timing, and low-power implementations across AI, mobile, automotive, and data-center projects.

The role involves collaborating with architecture, RTL, DFT, and verification teams to deliver sign-off-ready designs and innovative low-power methodologies for new process nodes.