Physical Design Engineer – Low-Power ASIC/SoC Expert

QUALCOMM, Inc.; Austin (TX); Sur place; USD 146 000 - 218 000; Plein temps

Avantages offerts par ce poste

Annual bonus

RSU grants

Benefits package

Résumé du poste

Qualcomm Technologies, Inc. in Austin, TX is seeking an experienced ASIC/SoC Physical Design Engineer to drive end-to-end implementation from floorplanning to sign-off.

You will collaborate with architecture, RTL, DFT, verification, and methodology teams to optimize power, timing, and area. The role emphasizes MMMC timing, clock tree synthesis, CTS, routing, and RC extraction while advancing low-power techniques and automation through Python, Perl, TCL, and shell scripting.

Qualifications

• Bachelor's degree in Science, Engineering, or related field; 4+ years ASIC design/verification experience.
• Master's degree in Science, Engineering, or related field; 3+ years ASIC design/verification experience.
• PhD in Science, Engineering, or related field; 2+ years ASIC design/verification experience.

Responsabilités

• Execute and drive all stages of the physical design flow from synthesized netlist to tape-out.
• Develop and implement physical design solutions for complex, high-speed, and low-power ASICs and SoCs.
• Perform floorplanning, partitioning, power planning, and IR-drop analysis.
• Execute placement, CTS, routing, timing optimization, and timing closure across MMMC scenarios.
• Analyze and resolve timing violations, signal integrity issues, crosstalk, and PD rule violations.
• Perform RC extraction, physical verification, and formal verification activities.
• Implement ECOs and support design convergence through sign-off.
• Collaborate with architecture, RTL, DFT, verification, and methodology teams to ensure project success.
• Contribute to low-power implementation methodologies and customized place-and-route solutions.
• Develop automation and productivity tools using Python, Perl, TCL, Shell scripting, C/C++, and Linux/Unix environments.

Connaissances

Python

Perl

TCL

Shell scripting

C/C++

Linux/Unix

ASIC debugging

Automation scripts

Formation

Bachelor's degree in Science/Engineering or related field

Master's degree in Science/Engineering or related field

PhD in Science/Engineering or related field

Outils

Cadence Innovus

Synopsys Fusion Compiler

Synopsys PrimeTime SI

Physical verification methodologies

Description du poste

Qualcomm Technologies, Inc. in Austin, TX is seeking an experienced ASIC/SoC Physical Design Engineer to drive end-to-end implementation from floorplanning to sign-off.

You will collaborate with architecture, RTL, DFT, verification, and methodology teams to optimize power, timing, and area. The role emphasizes MMMC timing, clock tree synthesis, CTS, routing, and RC extraction while advancing low-power techniques and automation through Python, Perl, TCL, and shell scripting.