Senior Physical Design Engineer – Low-Power SoC/ASIC

Qualcomm Incorporated; San Diego (CA); On-site; USD 101,000 - 152,000; Full time

Job summary

Qualcomm Technologies, Inc. in San Diego is seeking talented Physical Design Engineers to join the SoC and ASIC Design organization. You will contribute across projects spanning high-performance computing, AI, mobile, automotive, data center, and next-gen semiconductors.

You will work on floorplanning, CTS, low-power implementation, timing analysis, and methodology development. Successful candidates will collaborate with architecture, RTL, DFT, verification, and tooling teams to drive sign-off

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• 2-10+ years of industry experience or relevant academic/project experience in Physical Design.

Responsibilities

• Execute and drive all stages of the physical design flow from synthesized netlist to tape-out.
• Develop and implement physical design solutions for complex, high-speed, and low-power ASICs and SoCs.
• Perform floorplanning, partitioning, power planning, and IR-drop analysis.
• Execute placement, clock tree synthesis (CTS), routing, timing optimization, and timing closure across MMMC scenarios.
• Analyze and resolve timing violations, signal integrity issues, crosstalk effects, and physical design rule violations.
• Perform RC extraction, physical verification, and formal verification activities.
• Implement ECOs and support design convergence through sign-off.
• Collaborate with architecture, RTL, DFT, verification, and methodology teams to ensure successful project execution.
• Contribute to the development of innovative low-power implementation methodologies and customized place-and-route solutions.
• Develop automation and productivity tools using scripting languages and software development techniques.

Skills

Python

Perl

TCL

Shell scripting

C/C++

Education

Bachelor's or Master's in Electrical Engineering or related field

Tools

Cadence Innovus

Synopsys Fusion Compiler

Synopsys PrimeTime SI

Digital design tooling

Job description

Qualcomm Technologies, Inc. in San Diego is seeking talented Physical Design Engineers to join the SoC and ASIC Design organization. You will contribute across projects spanning high-performance computing, AI, mobile, automotive, data center, and next-gen semiconductors.

You will work on floorplanning, CTS, low-power implementation, timing analysis, and methodology development. Successful candidates will collaborate with architecture, RTL, DFT, verification, and tooling teams to drive sign-off