Senior Physical Design Engineer - High-Perf ASIC/SoC

iFlow Inc.; Sunnyvale (CA); On-site; USD 100,000 - 150,000; Full time

Job summary

iFlow Inc. is seeking a highly skilled Physical Design Engineer to work on high-performance ASICs and custom silicon chips in Sunnyvale, CA. The candidate will have a key role in backend VLSI design, handling floorplanning, placement, routing, and timing closure tasks.

Experience of 5-18 years in physical design engineering, along with strong scripting skills and expertise in EDA tools, is essential for this position. Join our innovative team to contribute significantly to the design flow.

Qualifications

• 5-18 years of experience in physical design engineering.
• Strong scripting experience is required.
• Expertise in EDA tools and methodologies.

Responsibilities

• Define optimal floorplan with power grid and macro placements.
• Optimize standard cell placement and clock tree synthesis.
• Ensure successful routing and timing closure.

Skills

Physical Design Engineering

Scripting

EDA tools expertise

VLSI design flow

Timing closure

Power optimization

Job description

iFlow Inc. is seeking a highly skilled Physical Design Engineer to work on high-performance ASICs and custom silicon chips in Sunnyvale, CA. The candidate will have a key role in backend VLSI design, handling floorplanning, placement, routing, and timing closure tasks.

Experience of 5-18 years in physical design engineering, along with strong scripting skills and expertise in EDA tools, is essential for this position. Join our innovative team to contribute significantly to the design flow.