Senior Physical Design Engineer for VR/AR Silicon

Meta; Redmond (WA); On-site; USD 146,000 - 209,000; Full time

Benefits offered by this job

Bonus

Equity

Benefits

Job summary

Meta's Silicon Engineering team seeks a Physical Design Engineer to translate RTL into optimized silicon, guiding floorplanning, CTS, routing, and sign-off for VR/AR hardware. You will drive power, timing, and area targets while collaborating with architecture, design, and verification teams across wearables and spatial computing platforms.

You will lead complex block implementations, optimize PD flows, and ensure sign-off integrity, applying advanced node experience and industry-standard tools.

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering or related field, or equivalent practical experience.
• 6+ years of physical design experience on complex digital ASICs/SoCs including floorplanning, CTS, routing and sign-off.
• 6+ years' experience with STA and timing closure in advanced nodes (7nm or below).
• Experience with PD tools Cadence Innovus, Synopsys ICC2, or equivalent PD flows.
• Experience with DRC, LVS and antenna sign-off in PD verification.
• Experience with power analysis and power delivery network implementation.

Responsibilities

• Lead physical implementation from floorplanning to tapeout for complex blocks.
• Define flows and constraints to meet power, performance and area targets.
• Perform timing analysis and close timing across process corners.
• Design and optimize power delivery networks, IR drop, electromigration sign-off.
• Collaborate with RTL/architect team to influence microarchitecture and floorplanning.
• Support verification/DFT to ensure functional correctness of PD.
• Drive PD sign-off including DRC, LVS and antenna checks.
• Identify bottlenecks and optimize congestion, timing, and power.
• Contribute to automation and scripts to improve PD flows.

Skills

Physical design

ASIC/SoC flow

Static timing analysis

Power integrity

Collaboration with RTL/architecture

Timing closure

Education

Bachelors in CS/CE or equivalent

Tools

Cadence Innovus

Synopsys ICC2

Fusion Compiler / ConfigAI

StarRC

PrimeTime

Job description

Meta's Silicon Engineering team seeks a Physical Design Engineer to translate RTL into optimized silicon, guiding floorplanning, CTS, routing, and sign-off for VR/AR hardware. You will drive power, timing, and area targets while collaborating with architecture, design, and verification teams across wearables and spatial computing platforms.

You will lead complex block implementations, optimize PD flows, and ensure sign-off integrity, applying advanced node experience and industry-standard tools.