Senior Packaging Design Lead - High-Speed ICs (San Jose)

Cisco Systems, Inc.; San Jose (CA); On-site; USD 187,000 - 268,000; Full time

Benefits offered by this job

401(k) match

Paid parental leave

Paid time off

Job summary

Cisco Silicon One in San Jose seeks a technical leader to drive complex package design programs, mentor engineers, and partner with SI/PI, layout, and manufacturing teams to deliver high-quality package solutions for next‑generation ASIC platforms.

The role emphasizes planning, optimization of pinouts, PDN, and cross-functional collaboration, with a focus on scalable, reliable designs in a fast-moving environment.

Qualifications

• Bachelor's degree in electrical engineering or a related field with 8+ years of relevant work experience or Master's degree with 6+ years of relevant work experience.
• Experience in high-speed package design, including signal integrity considerations and power distribution networks (PDN).
• Experience with industry-standard EDA tools for package layout and design.
• Experience with technical leadership in complex hardware or silicon development programs.

Responsibilities

• Lead complex package design programs, planning and driving schedules from concept through implementation and tapeout.
• Optimize package pinouts, stack-ups, power distribution, and high-speed routing, balancing performance, manufacturability, and reliability.
• Collaborate with silicon floor planning, signal integrity (SI), and power integrity (PI) teams to ensure design quality and system-level alignment.
• Work closely with layout editors and implementation teams to deliver high-quality package layouts aligned with interface and manufacturing requirements.
• Serve as the technical and organizational lead of the San Jose package design team, providing mentorship, and technical guidance to engineers.
• Develop and grow package design capability within the team, mentoring engineers and enabling them to take ownership of increasingly complex package programs.
• Coordinate resources across designers, layout editors, and contractors to support efficient project execution.
• Enhance package design methodologies and partner with vendors to improve product quality and efficiency.
• Drive innovation in package solutions for Cisco's next-generation ASIC platforms.

Skills

Team leadership

High-speed design

Package design

Signal integrity

PDN design

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

Tools

EDA tools

Job description

Cisco Silicon One in San Jose seeks a technical leader to drive complex package design programs, mentor engineers, and partner with SI/PI, layout, and manufacturing teams to deliver high-quality package solutions for next‑generation ASIC platforms.

The role emphasizes planning, optimization of pinouts, PDN, and cross-functional collaboration, with a focus on scalable, reliable designs in a fast-moving environment.