Senior Mixed-Signal DFT Engineer (Hybrid)

PER International; Austin (TX); Hybrid; USD 140,000 - 190,000; Full time

Benefits offered by this job

Performance bonus

Incentive programs

Health coverage

Life and disability insurance

Paid time off

Parental leave

Retirement benefits

Other employee benefits

Job summary

PER International in Austin, TX is seeking an experienced DFT engineer to design and implement test strategies for mixed-signal IP blocks. You will work across analog, digital, verification and integration teams to ensure high test coverage and manufacturability.

You will lead ATPG/diagnosis efforts, develop DFT architectures, and document procedures, while contributing to the evolution of best practices in semiconductor IP testing. Hybrid work model offered.

Qualifications

• Bachelor's or Master's in Electrical/Computer Engineering or related field.
• 7+ years of DFT implementation experience for digital/mixed-signal IP.
• Strong understanding of scan, ATPG, JTAG, test-point insertion and coverage analysis.
• Experience with industry-standard DFT tools: Synopsys DFT Compiler, TetraMax, Tessent, VCS, Verdi.
• Familiarity with RTL design and simulation using Verilog/VHDL.

Responsibilities

• Develop and implement DFT architectures for mixed-signal IP blocks.
• Perform scan insertion and test point insertion for digital portions.
• Develop test enablement strategies for analog/mixed-signal circuitry.
• Collaborate with analog and digital design teams to meet DFT requirements.
• Conduct DFT verification including ATPG, fault simulation and coverage analysis.
• Support scan diagnosis and testability analysis.
• Work with IP integration teams to embed DFT features into subsystems/SoCs.
• Document DFT architecture, verification methods, and test procedures.
• Contribute to continuous improvement of mixed-signal DFT methodologies.

Skills

DFT implementation

ATPG

JTAG

RTL design

Verilog

VHDL

debugging

test coverage analysis

Python

Scripting

Education

Bachelor's or Master's degree in Electrical Engineering

Tools

Synopsys DFT Compiler

TetraMax

Siemens Tessent

VCS

Verdi

Job description

PER International in Austin, TX is seeking an experienced DFT engineer to design and implement test strategies for mixed-signal IP blocks. You will work across analog, digital, verification and integration teams to ensure high test coverage and manufacturability.

You will lead ATPG/diagnosis efforts, develop DFT architectures, and document procedures, while contributing to the evolution of best practices in semiconductor IP testing. Hybrid work model offered.