Senior Microarchitectural DV Engineer - AI SoC Verification

Architect Labs; Palo Alto (CA); On-site; USD 190,000 - 250,000; Full time

Benefits offered by this job

Competitive salary and equity

Autonomy and impact

Cutting-edge AI & silicon challenges

Job summary

Architect Labs in Palo Alto seeks a Senior Staff Member for Design Verification & Validation to own the verification strategy for AI-generated designs taping out on leading foundries.

You will work at the intersection of hardware verification and AI-driven design automation, review test plans, define DV flows, and collaborate with architecture, design, and AI/ML teams to produce scalable collateral for multiple IPs and SoCs.

Qualifications

• 5+ years tapeout experience on advanced-node projects; 10+ preferred.
• Deep verification/validation expertise across IPs, SoC validation platforms.
• Strong coding in SystemVerilog, UVM, and C/C++ for test environments; Python is preferred.
• Hands-on verification experience across CPU subsystems, memory controllers, and interconnects.
• Ability to lead the DV function and drive cross-functional alignment.

Responsibilities

• Review AI-driven test plan and validation strategy for internal and external SoC projects.
• Provide domain-specific expertise to AI/ML teams, including checks, coverage models, and interfaces.
• Independently define and coordinate verification, validation, and integration flows across multiple IPs.
• Collaborate with architecture, design, and AI/ML leads to generate simulation- and emulation-ready collateral.
• Track trends in semiconductor verification and AI-driven design automation to keep methods cutting-edge.

Job description

Architect Labs in Palo Alto seeks a Senior Staff Member for Design Verification & Validation to own the verification strategy for AI-generated designs taping out on leading foundries.

You will work at the intersection of hardware verification and AI-driven design automation, review test plans, define DV flows, and collaborate with architecture, design, and AI/ML teams to produce scalable collateral for multiple IPs and SoCs.