Senior Design Verification Engineer — AI Silicon, Equity

Cerebras

Sunnyvale (CA)

Hybrid

USD 250.000 - 300.000

Vollzeit

14 Tage+

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Zusammenfassung

Cerebras Systems in Sunnyvale, CA, is seeking a senior Design Verification engineer with 10+ years of experience to advance verification for the world's largest AI chip. You will work with architects, RTL and software teams to ensure first-silicon quality and scalable verification strategies.

You will develop and implement verification plans, create reusable environments, and use SystemVerilog, DPI/UVM, and Python/Perl to build testbenches, debug issues, and improve efficiency and coverage

Qualifikationen

  • 10+ years of Design Verification experience.
  • Deep knowledge of SystemVerilog testbench, DPI and UVM.
  • Excellent programming skills and object-oriented design.
  • Experience with verification methodologies and tools such as simulators, waveform viewers, build and run automation, coverage collection, and gate level simulations.
  • Proficient in Python or Perl.

Aufgaben

  • Work with architects, designers, post silicon and software engineers to ensure a high-quality design that works first silicon.
  • Develop and implement verification strategies, detailed tests and coverage plans based on micro-architecture.
  • Create verification methodologies and reusable environments, including components such as stimulus, checkers, assertions, and coverage.
  • Implement tests, manage regressions, gather coverage, and debug test failures.
  • Collaborate with cross-functional teams including architecture, RTL design, physical design, firmware, and validation.
  • Analyze and debug complex issues across simulation, emulation, and silicon bring-up phases.
  • Continuously enhances verification infrastructure and flows to improve efficiency and quality.
  • Contribute to the evolution of the overall verification methodology and best practices across the organization.

Kenntnisse

SystemVerilog
DPI
UVM
Python
Perl
Debugging
Problem solving
Design Verification
Testbench
OO design

Ausbildung

BS in Computer Science or Electrical Engineering
MS in Computer Science or Electrical Engineering

Tools

Simulators
Waveform Viewers
Automation Tools
Gate Level Simulations

Jobbeschreibung

Cerebras Systems in Sunnyvale, CA, is seeking a senior Design Verification engineer with 10+ years of experience to advance verification for the world's largest AI chip. You will work with architects, RTL and software teams to ensure first-silicon quality and scalable verification strategies.

You will develop and implement verification plans, create reusable environments, and use SystemVerilog, DPI/UVM, and Python/Perl to build testbenches, debug issues, and improve efficiency and coverage

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