Senior MEMS Package Design Engineer — Innovate & Lead

SiTime Corp.; Santa Clara (CA); On-site; USD 165,000 - 227,000; Full time

Benefits offered by this job

401k plan

Equity grants

Quarterly bonus

Parental leave

Job summary

SiTime Corp. is seeking a Principal Semiconductor Package Engineer to design, develop and qualify custom packaging for MEMS-based timing products. You will handle QFN, WLCSP, ceramic and multi-chip packages, integrating MEMS and CMOS components.

You will lead packaging design, development, and production release, manage DoEs locally and overseas, and collaborate with OSATs to prototype and test new designs, ensuring performance, reliability and quality.

Qualifications

• MS or PhD in Mechanical Engineering or related field.
• 10+ years in semiconductor IC packaging technology.
• Experience managing overseas OSATs.
• Knowledge of leadframe-based, flip-chip, and substrate-based packages.
• Experience with flip-chip and bumping technologies.
• Understanding of thermal, stress, and electrical considerations in package design.
• Hands-on CAD experience (AutoCAD preferred).
• Willingness to work in a fast-paced, risk-taking environment.

Responsibilities

• Develop new packaging technology for SiTime’s MEMS-based timing solutions.
• Lead activities for package design, development, and release-to-production.
• Develop, manage, and analyze DoEs running locally and overseas.
• Manage development activities at OSATs.
• Work with OSATs to prototype and test new custom package designs.
• Ensure new technologies achieve required performance, reliability, and quality requirements.
• Lead troubleshooting activities related to package design or performance.

Skills

MS/PhD-ME

IC packaging

OSAT management

Leadframe packages

Flip-chip

Thermal analysis

CAD (AutoCAD)

Fast-paced work

Education

MS/PhD in ME

Tools

AutoCAD

Job description

SiTime Corp. is seeking a Principal Semiconductor Package Engineer to design, develop and qualify custom packaging for MEMS-based timing products. You will handle QFN, WLCSP, ceramic and multi-chip packages, integrating MEMS and CMOS components.

You will lead packaging design, development, and production release, manage DoEs locally and overseas, and collaborate with OSATs to prototype and test new designs, ensuring performance, reliability and quality.