Senior MEMS Package Design Engineer | Equity & Bonus

SiTime; Santa Clara (CA); On-site; USD 139,000 - 191,000; Full time

Benefits offered by this job

401k plan

Health and wellness

Equity grants

Quarterly bonus

Job summary

SiTime is seeking a Senior Semiconductor Package Engineer to specify, design, develop, and qualify custom packaging solutions for MEMS-based timing products, including QFN, WLCSP, ceramic, and multi-chip modules.

You will lead package design, coordinate with OSATs, and oversee DoEs and prototyping to ensure performance, reliability, and quality targets are met in fast-paced environments.

Qualifications

• MS or PhD in Mechanical Engineering, Materials Science, or related field.
• 5+ years experience in semiconductor IC packaging.
• Experience managing overseas OSATs to bring products into production.

Responsibilities

• Develop new packaging technology for SiTime’s MEMS-based timing solutions.
• Lead activities for package design, development, and release-to-production.
• Develop, manage, and analyze DoEs running locally and overseas.
• Manage development activities at OSATs.
• Work with OSATs to prototype and test new custom package designs.
• Ensure new technologies achieve required performance, reliability, and quality requirements.
• Lead troubleshooting activities related to package design or performance.

Skills

Semiconductor packaging

OSAT management

Package design

Flip-chip & bumping

CAD (AutoCAD)

Thermal-mechanical modeling

Education

MS/PhD in Mechanical Engineering or Materials Science

Tools

AutoCAD

Job description

SiTime is seeking a Senior Semiconductor Package Engineer to specify, design, develop, and qualify custom packaging solutions for MEMS-based timing products, including QFN, WLCSP, ceramic, and multi-chip modules.

You will lead package design, coordinate with OSATs, and oversee DoEs and prototyping to ensure performance, reliability, and quality targets are met in fast-paced environments.