Senior Mask Layout Engineer - Equity & High-Speed

NVIDIA Corporation

Santa Clara (CA)

Presencial

USD 132.000 - 236.000

Jornada completa

Hace 5 días
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Descripción de la vacante

NVIDIA Corporation in Santa Clara, California seeks a Senior Mask Layout Design Engineer to join a growing, diverse team responsible for high-speed mixed-signal circuit layouts and integration in VLSI products.

You will perform physical layout, floor planning, and verification using Cadence tools, collaborate with ASIC and analog engineers, and contribute to DRC/LVS flows; requires a BSEE and 8+ years of related experience, plus scripting in Perl or Python. Equity and benefits provided.

Formación

  • Has a BSEE or equivalent experience and minimum of 8+ years industry experience.
  • Deep understanding of analog circuit layout concepts in submicron CMOS technologies.
  • Authority with Cadence custom circuit design tools.
  • Experience with verification tools such as Dracula, Hercules, Calibre, and PrimeYield.
  • Proficient in scripting languages like Perl, Python, SKILL.
  • Knowledge of DRC and LVS checking flows, ability to customize decks.

Responsabilidades

  • Perform physical layout for mixed-signal functions (PLL, SerDes, ADC, ESD) in sub-micron CMOS.
  • Collaborate with ASIC and mixed-signal engineers to tailor designs for integration in VLSI products.
  • Participate in floor planning, custom layout, and verification against design rules and schematics.

Conocimientos

Analog circuit layout concepts
Scripting languages (Perl, Python, SKi

Educación

BSEE or equivalent

Herramientas

Cadence custom circuit design tools
Dracula
Hercules
Calibre
PrimeYield

Descripción del empleo

NVIDIA Corporation in Santa Clara, California seeks a Senior Mask Layout Design Engineer to join a growing, diverse team responsible for high-speed mixed-signal circuit layouts and integration in VLSI products.

You will perform physical layout, floor planning, and verification using Cadence tools, collaborate with ASIC and analog engineers, and contribute to DRC/LVS flows; requires a BSEE and 8+ years of related experience, plus scripting in Perl or Python. Equity and benefits provided.

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