Senior IO & Clocking Design Engineer for High-Speed DRAM

1000 Micron Technology, Inc.; Boise (ID); On-site; USD 100,000 - 130,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid family leave

Robust paid time-off program

Job summary

1000 Micron Technology, Inc. seeks an experienced MTS IO/Clocking Design Engineer to contribute to our IP Design team. You will innovate and verify high-speed IO and clocking circuits critical to our DRAM memory products.

The ideal candidate should possess a minimum of a Master's degree in Electrical Engineering alongside extensive experience in circuit design and strong communication skills. We offer a comprehensive benefits program, including medical, dental, and vision plans, along with paid time off.

Qualifications

• Minimum MSEE + 10 years or BSEE + 12 years of industry experience with a strong background in high-speed IO circuits.
• Strong understanding of good layout practices for high-speed circuits.

Responsibilities

• Innovate, design, optimize, and verify high-speed IO and clocking circuits.
• Develop accurate modeling, analysis, and simulation methodologies.
• Collaborate with process integration and transistor modeling teams.

Skills

High-speed IO circuit design

Strong communication skills

Ability to multi-task

Silicon validation efforts

Education

MSEE + 10 years or BSEE + 12 years of experience

Tools

Perl

Python

Job description

1000 Micron Technology, Inc. seeks an experienced MTS IO/Clocking Design Engineer to contribute to our IP Design team. You will innovate and verify high-speed IO and clocking circuits critical to our DRAM memory products.

The ideal candidate should possess a minimum of a Master's degree in Electrical Engineering alongside extensive experience in circuit design and strong communication skills. We offer a comprehensive benefits program, including medical, dental, and vision plans, along with paid time off.