Senior IC Packaging Engineer — FEA/CPI Specialist

Qualcomm; San Diego (CA); On-site; USD 127,000 - 191,000; Full time

Job summary

Qualcomm Technologies, Inc. in San Diego seeks a seasoned IC package FEA engineer to develop mechanical models, support CPI, DOE, and test correlation, leveraging ANSYS APDL/Workbench. You will work closely with design, NPI and CPI teams to advance packaging technologies and ensure reliability.

Responsibilities include warpage and stress analyses, solder joint reliability, package-assembly simulations, and material characterization. Strong communication and project execution skills are essential.

Qualifications

• 2+ years of System/Package Design/Technology Engineering or related work experience.
• Experience with ANSYS (APDL/Workbench) for IC packaging.
• Experience with material characterization and DOE methods.

Responsibilities

• Warpage/Stress analysis for IC packages.
• Solder joint reliability (SJR) prediction.
• Package assembly process simulation and CPI analysis.
• Develop and maintain FEA models and macros.
• Support test correlation and material characterization.

Skills

FEA expertise

Project execution

Strong communication

Education

Bachelor's degree in Chemical, Electrical, or Mechanical Engineering

Master's degree in Chemical, Electrical, or Mechanical Engineering

PhD in Chemical, Electrical, or Mechanical Engineering

Tools

ANSYS APDL/Workbench

Internal AI tools for APDL coding

Job description

Qualcomm Technologies, Inc. in San Diego seeks a seasoned IC package FEA engineer to develop mechanical models, support CPI, DOE, and test correlation, leveraging ANSYS APDL/Workbench. You will work closely with design, NPI and CPI teams to advance packaging technologies and ensure reliability.

Responsibilities include warpage and stress analyses, solder joint reliability, package-assembly simulations, and material characterization. Strong communication and project execution skills are essential.