Senior High-Speed Analog IC Layout Engineer (Remote-USA)

Arrow Enterprise Computing Solutions; United States; On-site; USD 120,000 - 190,000; Full time

Benefits offered by this job

Travel opportunities

Job summary

Arrow, through its eInfochips subsidiary, seeks an experienced Analog Layout Engineer to design physical silicon layouts for high-speed mixed-signal blocks. The role involves floor planning, block integration, and managing co-design with packaging considerations in a high-performance environment.

The candidate should have 5–12+ years of hands-on layout experience at deep sub-micron CMOS nodes (N3/N5/N7) and a Bachelor's degree.

Qualifications

• 5–12+ years hands-on custom IC layout experience.
• Experience at lower nodes (N3, N5) is critical for this position.
• Bachelor's degree required in a relevant field.

Responsibilities

• Floor Planning & Integration: create block-level and chip-top-level floor plans, manage hierarchical block integration, and handle micro-bump or package-aware co-design.
• Parasitic & Noise Control: address layout-dependent effects (LOD, WPE, LDE), device matching, guard rings, and isolation/shielding.

Skills

Layout experience in deep sub-micron &

DRC/LVS/ERC expertise

Node knowledge N3/N5/N7

Travel ability

Education

Bachelor's degree

Job description

Arrow, through its eInfochips subsidiary, seeks an experienced Analog Layout Engineer to design physical silicon layouts for high-speed mixed-signal blocks. The role involves floor planning, block integration, and managing co-design with packaging considerations in a high-performance environment.

The candidate should have 5–12+ years of hands-on layout experience at deep sub-micron CMOS nodes (N3/N5/N7) and a Bachelor's degree.