Senior Analog Layout Engineer - High-Speed CMOS| Flexible

Ciena; United States; Remote; USD 120,000 - 150,000; Full time

Job summary

Ciena is seeking an Analog Layout Engineer in the United States to contribute to high-speed analog circuits in deep-submicron CMOS and BiCMOS, including DAC, ADC, SERDES, and related blocks. You’ll craft layouts through floor planning, placement, and routing, while performing thorough verification checks.

The role emphasizes collaboration with senior designers and cross-functional teams, with a focus on delivering high-performance layouts for broadband fiber-optic modem solutions.

Qualifications

• Bachelor’s degree in Electrical Engineering or related field.
• 5+ years of relevant industry experience.
• Custom analog and mixed-signal layout design using deep-submicron CMOS devices, including FinFET transistors.
• Ability to collaborate with cross-functional teams and communicate effectively.

Responsibilities

• Evaluate layout feasibility for circuit designs with senior analog designers.
• Create layouts for assigned analog blocks through floor planning, placement, and routing.
• Perform DRC, ANT, LVS, PERC, EM, and IR verification checks.
• Investigate layout tool and process features to boost productivity.
• Provide regular status updates and share knowledge with the group.

Skills

Custom analog layout

Mixed-signal layout

Team collaboration

Communication

Education

Bachelor’s degree in Electrical Engineering

Tools

Cadence Virtuoso

Siemens Calibre

Ansys Totem

Job description

Ciena is seeking an Analog Layout Engineer in the United States to contribute to high-speed analog circuits in deep-submicron CMOS and BiCMOS, including DAC, ADC, SERDES, and related blocks. You’ll craft layouts through floor planning, placement, and routing, while performing thorough verification checks.

The role emphasizes collaboration with senior designers and cross-functional teams, with a focus on delivering high-performance layouts for broadband fiber-optic modem solutions.