Remote High-Speed Analog Layout Architect

Arrow Electronics; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

eInfochips, an Arrow company, is seeking an experienced Analog Layout Engineer for high-speed mixed-signal design in Austin, USA. You will design physical silicon layouts for SerDes, ADCs, DACs, and PLLs, focusing on floor planning and integration.

The role requires 5–12+ years of hands-on layout in deep sub-micron CMOS/FinFET nodes (N3/N5). You will ensure DRC/LVS/ERC compliance, address parasitic effects, and implement robust ESD protection, working onsite at client locations as needed.

Qualifications

• 5–12+ years of hands-on analog layout experience in deep sub-micron CMOS/FinFET.
• Experience at lower nodes (N3, N5) is critical.
• Bachelor’s degree required.

Responsibilities

• Design physical silicon layout for high-speed analog circuits (SerDes, ADCs, DACs, PLLs).
• Create block-level and chip-top-level floor plans and manage integration.
• Address parasitic effects and noise control, including LOD, WPE, LDE, guard rings, and shielding.
• Ensure DRC, LVS, ERC, antenna rules compliance and ESD protection.

Skills

Floor planning

Parasitic control

LVS/DRC

EM/IR reliability

ESD protection

CMOS FinFET

Deep sub-micron layouts

N3/N5 nodes

Education

Bachelor’s degree

Job description

eInfochips, an Arrow company, is seeking an experienced Analog Layout Engineer for high-speed mixed-signal design in Austin, USA. You will design physical silicon layouts for SerDes, ADCs, DACs, and PLLs, focusing on floor planning and integration.

The role requires 5–12+ years of hands-on layout in deep sub-micron CMOS/FinFET nodes (N3/N5). You will ensure DRC/LVS/ERC compliance, address parasitic effects, and implement robust ESD protection, working onsite at client locations as needed.