Senior Hardware Design Engineer, Storage Systems

Everpure, Inc.

Santa Clara (CA)

On-site

USD 180,000 - 270,000

Full time

5 days ago
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Benefits offered by this job

Incentive pay
Equity
Flexible time off

Job summary

Everpure, Inc. in Santa Clara, CA, is seeking an experienced hardware engineer to lead the design, validation, and qualification of storage hardware that powers our FlashArray products. You will own cross‑functional hardware projects from concept to production and mentor junior engineers.

The role emphasizes x86 architecture, PCIe, power and thermal analysis, and automation scripting. We value hands‑on experience with high‑speed signaling, Verilog, and a collaborative approach to delivering

Qualifications

  • 8+ years in x86 architecture and storage hardware development, validation, and qualification.
  • Bachelor’s in EE or CE; MS preferred.

Responsibilities

  • Plan, lead, implement hardware design and qualification projects from concept through production.
  • Participate in all phases of product development including architecture design, documentation, FA, and support.
  • Define, execute, and automate hardware validation and qualification frameworks.
  • Partner with Software, Operations, Manufacturing Test, and Support to introduce new storage subsystems into production.
  • Serve as escalation point for internal testbeds and complex hardware issues; perform deep-dive failure analysis.
  • Provide mentorship to junior engineers and evolve design techniques.

Skills

x86 architecture
Storage hardware
Automation scripting
Diagnostics & test planning
High‑speed signaling
Power & thermal analysis
Verilog
CPLD design

Education

B.S. in Electrical Engineering or Computer Engineering
M.S. preferred

Tools

Verilog
CPLD design

Job description

Everpure, Inc. in Santa Clara, CA, is seeking an experienced hardware engineer to lead the design, validation, and qualification of storage hardware that powers our FlashArray products. You will own cross‑functional hardware projects from concept to production and mentor junior engineers.

The role emphasizes x86 architecture, PCIe, power and thermal analysis, and automation scripting. We value hands‑on experience with high‑speed signaling, Verilog, and a collaborative approach to delivering

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