Senior GPU HSIO & NVLink Power Architect (Equity)

NVIDIA; United States; On-site; USD 168,000 - 265,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA Silicon Co-Design Group is seeking a versatile engineer to join the HW ArchDev team. You will work across silicon and system-level features, focusing on high-speed interconnects like NVLink and NVLink-C2C to improve efficiency and stability.

You will partner with system architects, design teams, firmware, and QA to drive design, bringup, debugging, and release of next-generation products across AI, graphics, and automotive domains.

Qualifications

• BS or MS in EE/CE or equivalent experience required.
• Minimum 10 years working on HSIO with power management, perf/power modeling, bringup or debug.
• Experience with system-level and interconnect power optimizations is a plus.

Responsibilities

• Contribute to the design of the next generation of high-speed IOs, including NVLink and NVLink-C2C.
• Responsible for IO power optimizations and energy efficiency improvements.
• Ensure interoperability with connected devices and system components in complex interconnect topologies.
• Deep dive into HSIO bugs and drive debugging efforts across multiple teams.

Skills

HSIO design

Power management

Interconnects

System-level debugging

Cross-team collaboration

Education

BS or MS in EE/CE or equivalent

Job description

NVIDIA Silicon Co-Design Group is seeking a versatile engineer to join the HW ArchDev team. You will work across silicon and system-level features, focusing on high-speed interconnects like NVLink and NVLink-C2C to improve efficiency and stability.

You will partner with system architects, design teams, firmware, and QA to drive design, bringup, debugging, and release of next-generation products across AI, graphics, and automotive domains.