Senior HSIO Power Architect for NVLink and SoC

NVIDIA

Hillsboro (OR)

On-site

USD 168,000 - 311,000

Full time

7 days ago

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Job summary

NVIDIA Silicon Co-Design Group seeks a versatile engineer for the HW ArchDev team, providing an end-to-end view from arch definition to product release. You will work on next-gen high-speed interconnects like NVLink and NVLink-C2C, focusing on energy efficiency, interoperability, and deep debugging across multiple teams.

Role involves coordinating with system architects, mixed signal, DGX, firmware, software QA, and operations to enable design, bringup, and release of cutting-edge products

Qualifications

BS or MS in EE/CE or equivalent experience.
10+ years in HSIO with power management, perf/power modeling, bringup or debug.
Experience in system-level interconnect power optimizations and firmware/driver interaction with HW.
Strong collaboration and leadership across multiple teams.

Responsibilities

Design the next generation of high-speed IOs, including NVLink and NVLink-C2C.
Optimize IO power and energy efficiency.
Ensure interoperability with system components in complex interconnect topologies.
Troubleshoot HSIO bugs and drive debug efforts across teams.
Collaborate with system architects, DGX, software/firmware, QA, and other teams to drive design, development, and release of next-generation products.

Skills

HSIO

Power management

Perf/Power modeling

Bringup

Debugging

System-level design

Education

BS/MS in EE/CE

Job description

Role involves coordinating with system architects, mixed signal, DGX, firmware, software QA, and operations to enable design, bringup, and release of cutting-edge products

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