Senior FPGA Engineer – Radar Systems (DoD Secret)

RTX

Tewksbury (MA)

On-site

USD 108,000 - 205,000

Full time

14 days+

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Benefits offered by this job

Relocation assistance

Job summary

RTX in MA seeks a Principal Electrical Engineer to lead FPGA-based radar control and signal processing designs. Translate system requirements into FPGA specs, develop VHDL/Verilog, and deliver production-ready releases while mentoring junior engineers.

The role requires 8+ years in digital design, DoD Secret clearance, and FPGA experience with Xilinx/AMD or Intel devices, timing closure, and high-speed interfaces. Relocation eligible; comprehensive benefits offered.

Qualifications

  • Typically requires STEM degree and 8+ years of relevant experience.
  • Demonstrated experience with digital design and VHDL or Verilog coding.
  • Experience designing and integrating with FPGA devices from AMD/Xilinx, Intel/Altera, or similar.
  • Experience using synthesis and design tools (Synplify, Vivado, Quartus Pro).
  • Experience with timing closure and debug tools (Chipscope, Signal Tap).
  • Experience defining requirements for FPGA products and verifying designs.

Responsibilities

  • Own or contribute to FPGA-based designs on time and budget.
  • Collaborate to meet system-level requirements and architecture.
  • Lead small teams and mentor junior engineers when needed.
  • Design and deliver production-grade FPGA releases from concept to production.
  • Work with systems, hardware, software, and program management for product success.
  • Translate system requirements into FPGA requirements and verify with tests.

Skills

Digital design
VHDL
Verilog
FPGA integration
Xilinx/AMD
Intel/Altera
Timing closure
C/C++
Linux

Education

STEM degree

Tools

Synplify
Xilinx Vivado
Intel Quartus Pro

Job description

RTX in MA seeks a Principal Electrical Engineer to lead FPGA-based radar control and signal processing designs. Translate system requirements into FPGA specs, develop VHDL/Verilog, and deliver production-ready releases while mentoring junior engineers.

The role requires 8+ years in digital design, DoD Secret clearance, and FPGA experience with Xilinx/AMD or Intel devices, timing closure, and high-speed interfaces. Relocation eligible; comprehensive benefits offered.

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