Senior FPGA/ASIC Verification Engineer - Onsite Fort Wayne

Prattwhitney; United States; On-site; USD 108,000 - 205,000; Full time

Benefits offered by this job

Medical, dental, and vision insurance

Three weeks of vacation

Generous 401(k) with matching and nest

Tuition reimbursement

Student Loan Repayment Program

Life insurance and disability coverage

Relocation assistance

Wellness and family support programs

Employee assistance plan

Job summary

RTX is seeking a Principal Electrical or Computer Engineer to lead design, implementation, and verification of advanced testbenches for high‑performance ASICs and FPGAs. Based onsite in Fort Wayne, IN, you will drive signal processing and information assurance techs for Mission Systems in the Microelectronics Technology team.

The role requires leadership, strong RTL verification expertise (SystemVerilog/VHDL/Verilog), and collaboration across multidisciplinary teams. Eligibility for U.S.

Qualifications

• STEM degree and 8+ years of relevant experience, or an advanced degree with 5+ years experience.
• Active and transferable U.S. government security clearance required before start date.
• U.S. citizenship required for clearance eligibility.
• Experience developing and simulating RTL designs using VHDL and/or Verilog in FPGA/ASIC environments.
• 4+ years of experience in RTL verification with VHDL/Verilog in professional settings.
• Ability to lead/mentor junior engineers within a team.
• Proven ability to design and execute RTL verification testbenches (VHDL/SystemVerilog).
• 4+ years applying chip verification methodologies: constrained-random testing, functional coverage, assertions.
• Experience with Git or Subversion for source control and collaboration.
• Experience with ASIC/FPGA lab validation, DFT, manufacturability, and production test concepts.
• Proficiency in Unix/Linux, scripting (Python, C, C++, Perl, shell), and industry tools (QuestaSim, Synplify, Quartus, Vivado).
• Strong written and verbal communication; able to work independently and in fast-paced teams.

Responsibilities

• Verification environment architecture and design using SystemVerilog with OVM/UVM.
• Create written test plans, test cases, code and functional coverage tracking.
• Develop testbenches for RTL blocks using VHDL or SystemVerilog.
• Recommend new tools and practices to improve ASIC/FPGA verification flow.
• Contribute to engineering estimates for new programs.
• Provide technical leadership for project verification teams, planning work and reporting status.

Skills

SystemVerilog

VHDL

Verilog

C/C++

Python

UVM

Education

STEM degree

Advanced degree preferred

Tools

QuestaSim

Synplify

Quartus

Vivado

Job description

RTX is seeking a Principal Electrical or Computer Engineer to lead design, implementation, and verification of advanced testbenches for high‑performance ASICs and FPGAs. Based onsite in Fort Wayne, IN, you will drive signal processing and information assurance techs for Mission Systems in the Microelectronics Technology team.

The role requires leadership, strong RTL verification expertise (SystemVerilog/VHDL/Verilog), and collaboration across multidisciplinary teams. Eligibility for U.S.