Security-Cleared FPGA/ASIC Engineer II (RTL)

Prattwhitney; Fort Wayne (IN); On-site; USD 69,000 - 131,000; Full time

Benefits offered by this job

Medical, dental, and vision insurance

Three weeks vacation

Generous 401(k) plan with employer 401

Tuition reimbursement

Job summary

RTX in Fort Wayne seeks an early-career engineer to support requirements capture and ASIC/FPGA digital architecture. You will implement RTL designs and assist in verification and system integration, collaborating with a skilled team to deliver robust hardware solutions for defense and space applications.

The role emphasizes learning best practices and leveraging cutting-edge tools (Modelsim, Quartus, Vivado) while ensuring readiness for DoD clearance and security requirements.

Qualifications

• Degree in STEM or related field with 2+ years of relevant experience
• Ability to obtain/maintain DoD security clearance
• U.S. citizenship required for clearance eligibility
• 1+ years RTL coding and simulation in VHDL/Verilog/SystemVerilog
• Experience debugging hardware using schematics and lab equipment

Responsibilities

• Support requirements capture and ASIC/FPGA digital architecture
• Implement ASIC/FPGA RTL designs
• Support verification and system integration of ASIC/FPGA implementations
• Collaborate with an experienced engineering team to learn best practices

Skills

RTL coding

Debug hardware

Revision control

Communication

Education

Bachelor's degree in STEM

Tools

Modelsim

Quartus

Vivado

FPGA debugging tools

Job description

RTX in Fort Wayne seeks an early-career engineer to support requirements capture and ASIC/FPGA digital architecture. You will implement RTL designs and assist in verification and system integration, collaborating with a skilled team to deliver robust hardware solutions for defense and space applications.

The role emphasizes learning best practices and leveraging cutting-edge tools (Modelsim, Quartus, Vivado) while ensuring readiness for DoD clearance and security requirements.