Senior FPGA Architect for Defense Systems (Onsite Tucson)

RTX

Tucson (AZ)

On-site

USD 108,000 - 205,000

Full time

10 days ago

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Benefits offered by this job

Relocation assistance

Job summary

RTX in Tucson, AZ is seeking a Principal FPGA Design Engineer to develop FPGA/VHDL-based solutions for DoD applications. The role is 100% onsite in Tucson, requiring a DoD Secret clearance or ability to obtain one, and involves architecture, coding, and verification across multiple FPGA devices.

Responsibilities include delivering production-quality FPGA releases, translating system requirements, and mentoring junior engineers within the Effector Digital Products (EDP) group.

Qualifications

  • Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) with 8+ years of relevant experience.
  • FPGA/ASIC design (VHDL/Verilog) or FPGA/ASIC verification (SystemVerilog)
  • Xilinx or Microsemi devices and flow tools
  • Delivering FPGA/ASIC solutions to system-level applications
  • Hands-on integration and debugging of FPGA/ASIC devices

Responsibilities

  • Deliver production-quality FPGA releases from initial proof of concept to production.
  • Architect FPGA-based systems to determine parts, interfaces, and CONOPS.
  • Translate system-level requirements into FPGA requirements.
  • Design and code in VHDL/Verilog for reliability and maintainability.
  • Verify designs with directed tests and constrained random tests; track coverage.
  • Drive projects and manage schedules within budget.
  • Create documentation including requirements, verification plans, and user guides.

Skills

STEM degree
FPGA/ASIC design
VHDL/Verilog
SystemVerilog

Education

Degree in STEM field

Tools

Xilinx tools
Microsemi tools

Job description

RTX in Tucson, AZ is seeking a Principal FPGA Design Engineer to develop FPGA/VHDL-based solutions for DoD applications. The role is 100% onsite in Tucson, requiring a DoD Secret clearance or ability to obtain one, and involves architecture, coding, and verification across multiple FPGA devices.

Responsibilities include delivering production-quality FPGA releases, translating system requirements, and mentoring junior engineers within the Effector Digital Products (EDP) group.

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