Senior Electrical Systems Architect: High-Speed Interconnects

QUALCOMM, Inc.; San Diego (CA); On-site; USD 257,000 - 385,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a Senior Leader, Electrical Systems Architect to define, develop, and productize next‑generation high‑speed electrical interconnect technologies for AI, hyperscale datacenter, networking, and HPC platforms.

You will lead architecture spanning silicon to rack‑scale systems and guide cross‑functional teams to deliver state‑of‑the‑art interconnect solutions. The successful candidate will possess deep expertise in 224G/448G PAM4 signaling, SI/PI methodologies,

Qualifications

• MS or PhD in Electrical Engineering or related discipline.
• 15+ years of experience in high-speed communication, networking, or datacenter products.
• Experience productizing 112G and/or 224G PAM4 electrical systems.

Responsibilities

• Define and drive end-to-end architecture for 224G/448G PAM4 interconnect systems (SerDes, package, PCB, connector, cable, flyover, rack-scale).
• Lead system-level SI and PI strategy including channel budgeting, COM analysis, and silicon-to-system correlation.
• Drive architecture, modeling, and optimization of PHY/SerDes, equalization, FEC, and performance tradeoffs.
• Partner with silicon, package, board, power, and system teams to productize advanced connectivity solutions.
• Provide technical leadership for future interconnect roadmaps enabling scalable AI infrastructure.

Skills

High-speed SerDes

PAM4 signaling

Signal Integrity

Power Integrity

Package design

PCB design

Connector design

Advanced packaging

Channel modeling

System-level analysis

IEEE standards knowledge

End-to-end electrical system

Education

MS in Electrical Engineering

PhD in Electrical Engineering

Tools

Cadence Sigrity

HFSS

ADS

HSPICE

MATLAB

Python

SystemVerilog

Verilog-A

COM analysis tools

IBIS-AMI modeling

Clarity

PowerSI

Job description

Qualcomm Technologies, Inc. is seeking a Senior Leader, Electrical Systems Architect to define, develop, and productize next‑generation high‑speed electrical interconnect technologies for AI, hyperscale datacenter, networking, and HPC platforms.

You will lead architecture spanning silicon to rack‑scale systems and guide cross‑functional teams to deliver state‑of‑the‑art interconnect solutions. The successful candidate will possess deep expertise in 224G/448G PAM4 signaling, SI/PI methodologies,