Senior Signal Integrity Architect — High-Speed Server Interconnects

Qualcomm; United States; On-site; USD 220,200 - 330,400; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a Signal Integrity Architect to lead high-performance SI initiatives for data-center-grade server interconnects.

You will own SI analysis, develop models, and collaborate with SoC, packaging, and system teams across CXL and GPIO interfaces. The role demands deep expertise in high-speed channel design, PDN, and 2.5D/3D packaging considerations, with hands-on experience using HFSS, Sigrity, CST, ADS, and HSPICE in a Linux environment.

Qualifications

• Master’s degree or higher in Electrical or Computer Engineering with SI specialization.
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Responsibilities

• Own SI analysis, simulation, and design closure for high-speed interfaces (CXL 2.0/3.0).
• Collaborate with SoC, applications engineering, packaging, and system design teams.
• Develop SI guidelines, PCB stack-ups, routing constraints, and material selection.
• Create full-topology SI models, simulations, and final designs across interfaces.
• Perform SI analysis on 2.5D/3D structures and contribute to packaging guidelines.
• Own GPIO/LSIO interface SI characterization (SPI, I3C, parallel interfaces).
• Support customer-facing SI collateral and reference apps for CXL.
• Develop design automation tools and set technical direction for SI.

Tools

ANSYS HFSS

Cadence Sigrity

CST

Keysight ADS

Synopsys HSPICE

Cadence Allegro

Job description

Qualcomm Technologies, Inc. is seeking a Signal Integrity Architect to lead high-performance SI initiatives for data-center-grade server interconnects.

You will own SI analysis, develop models, and collaborate with SoC, packaging, and system teams across CXL and GPIO interfaces. The role demands deep expertise in high-speed channel design, PDN, and 2.5D/3D packaging considerations, with hands-on experience using HFSS, Sigrity, CST, ADS, and HSPICE in a Linux environment.