Lead High-Speed Electrical/Optical Post-Silicon Engineer

Qualcomm

San Diego, Northern (CA, KY)

Hybrid

USD 192,000 - 288,000

Full time

14 days+

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Job summary

Qualcomm Technologies, Inc. is seeking a Senior Lead High-speed Electrical/Optical Post-Silicon Engineer to drive hands-on measurements, validation, and debug of 224G/448G interconnects across package, PCB, and system channels.

The role spans channel characterization, passive measurements, SerDes validation, PDN debug, and SW/HLOS‑driven system validation. You will lead post-silicon bring-up, margining, shmoo, and validation on reference boards and optical modules, with a focus on SerDes, PDN,

Qualifications

8+ years of post-silicon, SI/PI, SerDes/DDR, optical, package/PCB, or system validation.
Strong fundamentals in high-speed digital design, SerDes/DDR PHYs, SI/PI, transmission lines, jitter/noise, equalization, channel modeling, and measurement correlation.
Hands-on experience with VNAs, oscilloscopes, BERTs, TDR/TDT, rail probing, spectrum analyzers, optical BER/power test equipment, and precision probing/fixturing.
Experience validating and debugging high-speed links such as DDR, PCIe/CXL, Ethernet, UCIe/chip-to-chip, optical module interfaces, retimers, or similar SerDes-based interfaces.
Strong PDN/system debug experience, including rail noise/ripple, droop/coupling, sequencing, package/board PDN behavior, and workload-driven power stress.

Responsibilities

Plan and drive 224G/448G electrical/optical measurements and channel characterization across package, PCB, connector, cable, optical module, and system channels.
Lead bring-up, characterization, margining, shmoo, stress, compliance-readiness, and SW/HLOS-level validation across reference boards, optical modules, retimers, active/passive cables, and customer-like platforms.
Drive PDN measurement and failure isolation across self-noise, coupling, rail droop/ripple, sequencing, package/board power delivery, SI/PI, optics, firmware, drivers, clocking, thermal, software workloads, and platform integration.
Develop automation, data reduction scripts, dashboards, regression flows, and stress content to reproduce, isolate, and prevent electrical/optical/PDN failures.
Work with SerDes PHY, SIPI/PDN, package, PCB, optics, firmware, software, validation, systems architecture, platform, customer engineering, suppliers, and ecosystem partners to drive closure.