Senior DSP Physical Design Engineer - ASIC

MaC VC; Austin (TX); On-site; USD 174,000 - 262,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking an experienced ASIC Physical Design professional to drive synthesis, CTS, and overall physical design convergence.

Responsibilities include updating flows for optimal power, performance, and area and leading semi-custom design techniques to maximize utilization and efficiency. The role requires deep expertise in P&R, timing analysis, and scripting, with 12+ years in ASIC design/Synthesis and a strong CAD tool background (Synopsys, ICC2, Genus, Innovus).

Qualifications

• Bachelor's degree or higher in a science/engineering field; 12+ years ASIC Physical Design or Synthesis experience.
• Expertise in RTL-to-GDSII flows, place & route, and CTS processes.
• Strong CAD tool proficiency (Synopsys, Cadence) and scripting for flow automation.

Responsibilities

• Update physical implementation flows for optimal PPA.
• Drive development of semi-custom design techniques to maximize utilization, performance, and power efficiency.
• Use scripting to extend/enhance design methodologies for best PPA.

Skills

P&R optimization

Timing analysis

Logic optimization

Power optimization

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Tools

Synopsys FC/DC

ICC2

Cadence Genus

Innovus

Job description

Qualcomm Technologies, Inc. is seeking an experienced ASIC Physical Design professional to drive synthesis, CTS, and overall physical design convergence.

Responsibilities include updating flows for optimal power, performance, and area and leading semi-custom design techniques to maximize utilization and efficiency. The role requires deep expertise in P&R, timing analysis, and scripting, with 12+ years in ASIC design/Synthesis and a strong CAD tool background (Synopsys, ICC2, Genus, Innovus).