Principal Design Verification Architect – DDR6 & UVM

Renesas Electronics Corp.; Duluth (GA); On-site; USD 150,000 - 210,000; Full time

Job summary

Renesas Electronics Corp. seeks a Principal Design Verification Engineer to provide technical leadership for verification of next-generation semiconductor memory interface products, including data buffer silicon.

The role drives verification strategy and execution for complex digital designs, partnering with RTL and design teams to ensure functionality and performance. The ideal candidate has deep semiconductor verification expertise with SystemVerilog and UVM, with experience in high-speed

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• Extensive experience in semiconductor design verification with ownership of complex verification efforts.
• Expert-level proficiency with SystemVerilog.
• Significant hands-on experience with UVM, including development and optimization of UVM-based verification environments.
• Experience defining verification strategies and developing verification plans.
• Strong experience with functional verification, constrained-random testing, coverage closure, and debugging.

Responsibilities

• Lead verification strategy and execution for complex designs at block and system level.
• Define verification methodologies, test plans, coverage strategies, and environments.
• Architect and optimize SystemVerilog/UVM testbenches and verification environments.
• Drive test development, functional coverage, checkers, constrained-random verification, and coverage closure.
• Provide technical leadership and mentorship within the verification team.
• Communicate progress, risks, and readiness to leadership and stakeholders.

Skills

SystemVerilog

UVM

Technical leadership

Mentoring

Debugging

Communication

Problem solving

Education

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field

Tools

SystemVerilog

UVM

Testbenches

Debug/test automation

Job description

Renesas Electronics Corp. seeks a Principal Design Verification Engineer to provide technical leadership for verification of next-generation semiconductor memory interface products, including data buffer silicon.

The role drives verification strategy and execution for complex digital designs, partnering with RTL and design teams to ensure functionality and performance. The ideal candidate has deep semiconductor verification expertise with SystemVerilog and UVM, with experience in high-speed