Senior Digital RTL Architect — Lead IC Design & Mentorship

Renesas Electronics Corp.; Duluth (GA); On-site; USD 140,000 - 190,000; Full time

Job summary

Renesas Electronics Corp. is seeking a senior RTL design engineer to propose, architect, and design Verilog RTL for a mixed-signal IC. You will contribute to a highly experienced team and help drive clocking controls, FSM design, low power techniques, and high-speed design concepts.

The role requires 12+ years in ASIC/IC design, fluent Verilog RTL coding, and strong experience in synthesis, STA, LEC, and DFT insertion. You will mentor junior engineers and collaborate in design reviews.

Qualifications

• Education: Bachelor or Master in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 12+ years of experience in ASIC/IC design and full IC design flow.
• Fluent in Verilog RTL coding and ASIC design methodology.
• Experience with static timing analysis and place-and-route constraints.
• Experience with gate-level simulations and timing violations.
• Experience with DFT or physical design is a plus.

Responsibilities

• Propose, architect, and design RTL in Verilog for a mixed-signal IC.
• Oversee digital backend design including synthesis, STA, and LEC.
• Participate in design, architecture, and verification reviews.
• Create documentation for design, verification, and test teams.
• Mentor and train junior engineers.

Skills

Verilog RTL

ASIC design

Digital design

Synthesis

STA

Education

Bachelor or Master in Electrical/CS/Engineering

Tools

DFT insertion

Formal verification

Linting

CDC/RDC checking

Job description

Renesas Electronics Corp. is seeking a senior RTL design engineer to propose, architect, and design Verilog RTL for a mixed-signal IC. You will contribute to a highly experienced team and help drive clocking controls, FSM design, low power techniques, and high-speed design concepts.

The role requires 12+ years in ASIC/IC design, fluent Verilog RTL coding, and strong experience in synthesis, STA, LEC, and DFT insertion. You will mentor junior engineers and collaborate in design reviews.