Sr Staff Digital Engineer

SmartRecruiters, Inc.; Duluth (GA); On-site; USD 150,000 - 230,000; Full time

Benefits offered by this job

Competitive benefits package

Job summary

Renesas Electronics in the United States seeks an experienced ASIC/IC design engineer to architect and design RTL in Verilog for a mixed-signal IC. You will work within a senior team on clocking controls, FSM design, low power techniques, and high-speed concepts for advanced silicon.

The role entails participating in design, architecture, and verification reviews, and supervising the digital backend, including synthesis, STA, and LEC.

Qualifications

• Education: Bachelor or Master in Electrical/ECE/CS or related field with 12+ years of experience.
• 8+ years direct ASIC/IC design experience.
• Fluent in Verilog RTL coding and ASIC design methodology.
• Expertise in digital design implementation including synthesis and DFT insertion with high coverage.
• Experience with static timing analysis and creation of place and route constraints.
• Proficiency in formal verification, linting, and CDC/RDC checking.
• Knowledge of asynchronous clock crossings and RTL synthesis implications.
• Experience implementing and verifying ECOs on RTL, synthesized, and post-route netlists.
• Developing design constraints for synthesis, STA, and P&R hand-off.
• Experience with gate-level simulations and timing violation analysis.

Responsibilities

• Participate in design, architecture, and verification reviews.
• Oversee digital backend design, including synthesis, static timing analysis, and logic equivalence checking.
• Create documentation targeting design, verification, and test teams.
• Assist with proposal, definition, documentation, and implementation of new features.
• Mentor and train junior engineers and New College Grad engineers.

Skills

Verilog RTL coding

ASIC design

Digital design

Synthesis

Static timing analysis

DFT insertion

Formal verification

Linting

CDC/RDC checking

Clocking controls

Education

Bachelor's or Master's degree in Electrical Engineering/Computer Engineering/Computer Science

Job description

Propose, architect, and design RTL in Verilog for use in a mixed-signal integrated circuit

Contribute as part of a highly experienced team of engineers with extensive cross-functional skill set

Apply clocking controls, FSM design, low power techniques, and high-speed design concepts

• Participate in design, architecture, and verification reviews
• Oversee digital backend design, including synthesis, static timing analysis, and logic equivalence checking
• Create documentation targeting design, verification, and test teams
• Assist with the proposal, definition, documentation, and implementation of new features
• Mentor and train junior engineers and New College Grad engineers

Qualifications

Qualifications

• Education:Bachelor or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with minimum 12+ years of experience
• 8+ years of direct experience in ASIC/IC design with deep knowledge of the entire IC design flow
• Experience in architecting digital designs and writing device-level or sub-system specifications.
• Fluent in Verilog RTL coding and ASIC design methodology
• Expertise in digital design implementation, including logical synthesis and DFT insertion with high coverage
• Experience with static timing analysis and creation of place and route constraints
• Proficiency in formal verification, linting, and CDC/RDC checking
• Knowledge of asynchronous clock crossings and synthesis implications of RTL
• Experience implementing and verifying ECOs on RTL, synthesized, and post-route netlists
• Competence in developing design constraints for synthesis, STA, and P&R hand-off
• Experience with gate-level simulations and understanding the causes and implications of timing violations
• Familiarity with ATPG generation and ATE support (a plus)
• Experience in DFT or physical design (a plus)

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world-leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement .

Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.