Senior Digital Design Engineer: RTL & Low-Power

Micron; Richardson (TX); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time off

Paid holidays

Job summary

Micron Technology is seeking an experienced digital design engineer to drive all stages of the design flow, from concept through post‑silicon debug. You will develop RTL in Verilog/SystemVerilog, refine micro‑architectures, and optimize for area, power, latency, and throughput while documenting decisions.

Collaborating with verification, DFT, physical design, and CAD teams, you will ensure robust design closure and high coverage, employing low‑power strategies and AI‑assisted methods to improve

Qualifications

• Develop high‑quality RTL in Verilog/SystemVerilog.
• Define micro‑architecture for digital logic blocks (FSMs, datapaths, FIFOs, pipelines).
• Analyze tradeoffs across area, power, latency and throughput; document design decisions.

Responsibilities

• Drive all stages of the digital design flow from concept to post‑silicon debug.
• Collaborate with verification, DFT, physical design and CAD teams to ensure closure and high coverage.
• Apply low‑power design methodologies including CPF/UPF and clock gating.
• Utilize AI‑enabled tools to assist with daily execution.

Skills

Verilog/SystemVerilog

RTL design

Timing analysis

Low-power design

AI-assisted design

CDC/RDC analysis

Tools

Synthesis tools

SDC constraints

STA tools

DFT/CAD tooling

Job description

Micron Technology is seeking an experienced digital design engineer to drive all stages of the design flow, from concept through post‑silicon debug. You will develop RTL in Verilog/SystemVerilog, refine micro‑architectures, and optimize for area, power, latency, and throughput while documenting decisions.

Collaborating with verification, DFT, physical design, and CAD teams, you will ensure robust design closure and high coverage, employing low‑power strategies and AI‑assisted methods to improve