Senior Digital Design Engineer - RTL Architect & Low-Power

Micron Technology; Richardson (TX); On-site; USD 140,000 - 190,000; Full time

Benefits offered by this job

Medical, dental, vision plans

Paid time off & holidays

Family leave benefits

Job summary

Micron Technology is seeking an experienced digital design engineer in Richardson, TX to drive the full RTL design flow from concept to post‑silicon debug. You will craft high‑quality RTL in Verilog/SystemVerilog, refine micro‑architecture, and collaborate across verification, physical design and CAD teams to ensure robust design closure.

The role emphasizes power and performance tradeoffs, timing analysis, and the use of AI tools to streamline daily tasks in a demanding memory and storage

Responsibilities

• Drive all stages of the digital design flow from concept to post‑silicon debug.
• Develop high‑quality RTL in Verilog/SystemVerilog using scalable design techniques.
• Define micro‑architecture for digital logic blocks including FSMs and datapaths.
• Analyze area, power, latency and throughput tradeoffs with clear design notes.
• Utilize AI‑Enabled tools to assist daily design tasks.
• Perform CDC/RDC analysis and apply robust clocking and reset strategies.
• Support synthesis and STA with SDC constraints and timing reports.
• Apply low‑power methods including CPF/UPF, clock gating and multi‑domain partitioning.
• Collaborate with verification, DFT, physical design and CAD teams for robust closure.

Job description

Micron Technology is seeking an experienced digital design engineer in Richardson, TX to drive the full RTL design flow from concept to post‑silicon debug. You will craft high‑quality RTL in Verilog/SystemVerilog, refine micro‑architecture, and collaborate across verification, physical design and CAD teams to ensure robust design closure.

The role emphasizes power and performance tradeoffs, timing analysis, and the use of AI tools to streamline daily tasks in a demanding memory and storage