Senior DFT Verification Engineer – High-Impact ASIC Remote

Delos Data; Palo Alto (CA); Hybrid; USD 160,000 - 230,000; Full time

Benefits offered by this job

Equity

401(k)

Benefits

Job summary

Delos Data is seeking a Senior DFT Verification Engineer to ensure correct ASIC DFT logic and robust verification environments. You will drive coverage plans, work with DFT design and manufacturing engineers, and apply industry-standard tools to deliver high-quality silicon.

Ideal candidates bring 5+ years in digital verification, strong SystemVerilog and Python skills, and hands-on experience with TestMax and Tessent. The role combines on-site and remote work with competitive compensation.

Qualifications

• Bachelor’s or Master’s degree in Electrical/Computer Engineering or a related field.
• 5+ years of digital design verification experience, with at least 2 in DFT verification.
• Strong hands-on experience with UVM-based verification methodologies.
• Proficiency in SystemVerilog and scripting (Python).
• Experience with industry-standard EDA tools such as VCS/Questa/Xcelium and DFT tools.

Responsibilities

• Develop, maintain and optimize RTL verification environments using UVM or equivalents.
• Create and execute coverage-driven verification plans aligned with design specs.
• Use EDA DFT tools (TestMax, Tessent) to run pre-silicon tests for MBIST and scan fabric.
• Develop directed test cases for non-vendor DFT logic and validate functionality.
• Assist in verifying ATPG patterns at SOC level and post-silicon test bring-up.

Skills

SystemVerilog

UVM

Python

EDA tools

DFT tools

Gate-level simulation

PCIe/Ethernet verification

Debugging/root-cause analysis

Collaboration/communication

Memory/MBIST

Education

Bachelor’s or Master’s in Electrical/Computer Engineering or related field

Tools

Synopsys VCS

Mentor Questa

Cadence Xcelium

Job description

Delos Data is seeking a Senior DFT Verification Engineer to ensure correct ASIC DFT logic and robust verification environments. You will drive coverage plans, work with DFT design and manufacturing engineers, and apply industry-standard tools to deliver high-quality silicon.

Ideal candidates bring 5+ years in digital verification, strong SystemVerilog and Python skills, and hands-on experience with TestMax and Tessent. The role combines on-site and remote work with competitive compensation.